Minor repositioning of new a64fx/sve code.

fgvanzee · fgvanzee · commit e7825469d91e · 2021-05-17T17:44:42.000-05:00
Details:
- Changed the order of the new A64fx and SVE code fragments to appear
  as the beginning of the armv8a-related code (rather appearing after
  other armv8a code).
- Fixed what is probably a copy-paste bug in frame/base/bli_cpuid.c.
  Previously, the a64fx conditional check was guarded by the cpp macro
  BLIS_CONFIG_ARMSVE, which has now been changed to BLIS_CONFIG_A64FX.
diff --git a/config_registry b/config_registry
@@ -32,11 +32,11 @@ piledriver:  piledriver
 bulldozer:   bulldozer
 
 # ARM architectures.
+armsve:      armsve/armsve
+a64fx:       a64fx/armsve
 thunderx2:   thunderx2/armv8a
 cortexa57:   cortexa57/armv8a
 cortexa53:   cortexa53/armv8a
-armsve:      armsve/armsve
-a64fx:       a64fx/armsve
 cortexa15:   cortexa15/armv7a
 cortexa9:    cortexa9/armv7a
 
diff --git a/frame/base/bli_arch.c b/frame/base/bli_arch.c
@@ -173,6 +173,12 @@ void bli_arch_set_id( void )
 		#endif
 
 		// ARM microarchitectures.
+		#ifdef BLIS_FAMILY_ARMSVE
+		id = BLIS_ARCH_ARMSVE;
+		#endif
+		#ifdef BLIS_FAMILY_A64FX
+		id = BLIS_ARCH_A64FX;
+		#endif
 		#ifdef BLIS_FAMILY_THUNDERX2
 		id = BLIS_ARCH_THUNDERX2;
 		#endif
@@ -182,12 +188,6 @@ void bli_arch_set_id( void )
 		#ifdef BLIS_FAMILY_CORTEXA53
 		id = BLIS_ARCH_CORTEXA53;
 		#endif
-		#ifdef BLIS_FAMILY_ARMSVE
-			id = BLIS_ARCH_ARMSVE;
-		#endif
-		#ifdef BLIS_FAMILY_A64FX
-			id = BLIS_ARCH_A64FX;
-		#endif
 		#ifdef BLIS_FAMILY_CORTEXA15
 		id = BLIS_ARCH_CORTEXA15;
 		#endif
diff --git a/frame/base/bli_cpuid.c b/frame/base/bli_cpuid.c
@@ -455,21 +455,21 @@ arch_t bli_cpuid_query_id( void )
 		{
 			// Check for each ARMv8 configuration that is enabled, check for that
 			// microarchitecture. We check from most recent to most dated.
+#ifdef BLIS_CONFIG_ARMSVE
+			if ( bli_cpuid_is_armsve( model, part, features ) )
+				return BLIS_ARCH_ARMSVE;
+#endif
+#ifdef BLIS_CONFIG_A64FX
+			if ( bli_cpuid_is_a64fx( model, part, features ) )
+				return BLIS_ARCH_A64FX;
+#endif
 #ifdef BLIS_CONFIG_THUNDERX2
 			if ( bli_cpuid_is_thunderx2( model, part, features ) )
 				return BLIS_ARCH_THUNDERX2;
 #endif
 #ifdef BLIS_CONFIG_CORTEXA57
 			if ( bli_cpuid_is_cortexa57( model, part, features ) )
 				return BLIS_ARCH_CORTEXA57;
-#endif
-#ifdef BLIS_CONFIG_ARMSVE
-			if ( bli_cpuid_is_armsve( model, part, features ) )
-				return BLIS_ARCH_ARMSVE;
-#endif
-#ifdef BLIS_CONFIG_ARMSVE
-			if ( bli_cpuid_is_a64fx( model, part, features ) )
-				return BLIS_ARCH_A64FX;
 #endif
 			// If none of the other sub-configurations were detected, return
 			// the 'generic' arch_t id value.
diff --git a/frame/include/bli_arch_config.h b/frame/include/bli_arch_config.h
@@ -83,6 +83,12 @@ CNTX_INIT_PROTS( bulldozer )
 
 // -- ARM architectures --
 
+#ifdef BLIS_CONFIG_ARMSVE
+CNTX_INIT_PROTS( armsve )
+#endif
+#ifdef BLIS_CONFIG_A64FX
+CNTX_INIT_PROTS( a64fx )
+#endif
 #ifdef BLIS_CONFIG_THUNDERX2
 CNTX_INIT_PROTS( thunderx2 )
 #endif
@@ -92,12 +98,6 @@ CNTX_INIT_PROTS( cortexa57 )
 #ifdef BLIS_CONFIG_CORTEXA53
 CNTX_INIT_PROTS( cortexa53 )
 #endif
-#ifdef BLIS_CONFIG_ARMSVE
-CNTX_INIT_PROTS( armsve )
-#endif
-#ifdef BLIS_CONFIG_A64FX
-CNTX_INIT_PROTS( a64fx )
-#endif
 #ifdef BLIS_CONFIG_CORTEXA15
 CNTX_INIT_PROTS( cortexa15 )
 #endif
@@ -189,6 +189,12 @@ CNTX_INIT_PROTS( generic )
 
 // -- ARM architectures --
 
+#ifdef BLIS_FAMILY_ARMSVE
+#include "bli_family_armsve.h"
+#endif
+#ifdef BLIS_FAMILY_A64FX
+#include "bli_family_a64fx.h"
+#endif
 #ifdef BLIS_FAMILY_THUNDERX2
 #include "bli_family_thunderx2.h"
 #endif
@@ -198,12 +204,6 @@ CNTX_INIT_PROTS( generic )
 #ifdef BLIS_FAMILY_CORTEXA53
 #include "bli_family_cortexa53.h"
 #endif
-#ifdef BLIS_FAMILY_ARMSVE
-#include "bli_family_armsve.h"
-#endif
-#ifdef BLIS_FAMILY_A64FX
-#include "bli_family_a64fx.h"
-#endif
 #ifdef BLIS_FAMILY_CORTEXA15
 #include "bli_family_cortexa15.h"
 #endif
diff --git a/frame/include/bli_type_defs.h b/frame/include/bli_type_defs.h
@@ -1005,11 +1005,11 @@ typedef enum
 	BLIS_ARCH_BULLDOZER,
 
 	// ARM
+	BLIS_ARCH_ARMSVE,
+	BLIS_ARCH_A64FX,
 	BLIS_ARCH_THUNDERX2,
 	BLIS_ARCH_CORTEXA57,
 	BLIS_ARCH_CORTEXA53,
-	BLIS_ARCH_ARMSVE,
-	BLIS_ARCH_A64FX,
 	BLIS_ARCH_CORTEXA15,
 	BLIS_ARCH_CORTEXA9,
 
@@ -1031,7 +1031,7 @@ typedef enum
 
 // NOTE: This value must be updated to reflect the number of enum values
 // listed above for arch_t!
-#define BLIS_NUM_ARCHS 25
+//#define BLIS_NUM_ARCHS 25
 
 
 //
