[release/9.0-staging] NativeAOT/Arm64: Do not overwrite gcinfo tracking registers for TLS#112549
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jeffschwMSFT merged 7 commits intorelease/9.0-stagingfrom Mar 6, 2025
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lgtm. we will take for consideration in 9.0.x
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@kunalspathak please take a look at the PR failures. we can merge when ready |
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@jeffschwMSFT - this should be ready to merge. Thanks! |
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go for it, I just hit the rebase button. the *-stagging branches are open to all committers to merge :) |
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This reverts commit 269225f.
…rt/pr-112469-to-release/9.0-staging
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@jeffschwMSFT - any idea how to make |
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not sure everything looks in order, merged |
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Backport of #112469 to release/9.0-staging
/cc @kunalspathak
Customer Impact
We were wrongly reporting certain registers has gc references which would lead the GC would interpret the values as them as valid object addresses and enumerate over them. This would lead to an undefined behavior or crash. Although it is a rare occurrence and certain events need to line up in place (method's register requirements in given method, trigger of GC at the instruction where wrong registers are tracked, etc.), it is still a potential issue because it can lead to fatal crash and diagnosing that crash would take an area expert (hard to root cause).
Regression
In #97910, we started inlining TLS access for NativeAOT for linux/arm64 and the issue was introduced since then.
Testing
The failing test was reverified and the asmdiffs were studied to make sure that we are reporting the gc references correctly.
Risk
Low. This optimization is present in our mainline for almost a year now and was found from our internal tool just recently.