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area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMICLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
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Over 52,000 tests in the runtime-coreclr jitstress-isas-x86 pipeline failed (presumably all) with:
Assert failure(PID 7268 [0x00001c64], Thread: 5492 [0x1574]): Assertion failed 'compIsaSupportedDebugOnly(InstructionSet_SSE2)' in 'VectorRelopTest`1[Single][System.Single]:VectorRelOp(float,float):int' during 'Importation' (IL size 1406)
File: F:\workspace\_work\1\s\src\coreclr\src\jit\simdashwintrinsic.cpp Line: 870
Image: C:\h\w\9D4B08E8\p\CoreRun.exe
JIT\SIMD\VectorRelOp_r\VectorRelOp_r.cmd [FAIL]
Assert failure(PID 7268 [0x00001c64], Thread: 5492 [0x1574]): Assertion failed 'compIsaSupportedDebugOnly(InstructionSet_SSE2)' in 'VectorRelopTest`1[Single][System.Single]:VectorRelOp(float,float):int' during 'Importation' (IL size 1406)
File: F:\workspace\_work\1\s\src\coreclr\src\jit\simdashwintrinsic.cpp Line: 870
Image: C:\h\w\9D4B08E8\p\CoreRun.exe
Return code: 1
Raw output file: C:\h\w\9D4B08E8\w\A49A0919\e\JIT\SIMD\Reports\JIT.SIMD\VectorRelOp_r\VectorRelOp_r.output.txt
Raw output:
BEGIN EXECUTION
"C:\h\w\9D4B08E8\p\corerun.exe" VectorRelOp_r.dll
Expected: 100
Actual: -1073740286
END EXECUTION - FAILED
FAILED
Test Harness Exitcode is : 1
To run the test:
> set CORE_ROOT=C:\h\w\9D4B08E8\p
> C:\h\w\9D4B08E8\w\A49A0919\e\JIT\SIMD\VectorRelOp_r\VectorRelOp_r.cmd
Expected: True
Actual: False
Stack Trace:
F:\workspace\_work\1\s\artifacts\tests\coreclr\Windows_NT.x86.Checked\TestWrappers\JIT.SIMD\JIT.SIMD.XUnitWrapper.cs(9646,0): at JIT_SIMD._VectorRelOp_r_VectorRelOp_r_._VectorRelOp_r_VectorRelOp_r_cmd()
Output:
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area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMICLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI