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area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMICLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
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https://godbolt.org/z/bnK78K83z
void Unoptimized(int tMinLeft, int tMinRight)
{
bool leftCloser = false;
if (tMinLeft < tMinRight)
{
leftCloser = true;
}
Consume(leftCloser);
}G_M34095_IG02: ;; offset=0x0000
xor ecx, ecx
mov eax, 1
cmp edx, r8d
cmovl ecx, eax
;; size=13 bbWeight=1 PerfScore 1.00
G_M34095_IG03: ;; offset=0x000D
tail.jmp [IDKEngine.Bvh.BVH:<Test>g__Consume|46_0(bool)]
;; size=6 bbWeight=1 PerfScore 2.00Instead of using 2 registers to store the values zero and one we could use setl to write either depending on the comparison result. Then it should be equivalent to this codegen for bool leftCloser = tMinLeft < tMinRight:
G_M34095_IG02: ;; offset=0x0000
cmp edx, r8d
setl cl
movzx rcx, cl
;; size=9 bbWeight=1 PerfScore 1.50
G_M34095_IG03: ;; offset=0x0009
tail.jmp [IDKEngine.Bvh.BVH:<Test>g__Consume|46_0(bool)]Reactions are currently unavailable
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area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMICLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI