Add the missing SetIsLclVar()

kunalspathak · kunalspathak · commit 92b67de68380 · 2023-04-19T23:30:58.000-07:00
diff --git a/src/coreclr/jit/emitarm64.cpp b/src/coreclr/jit/emitarm64.cpp
@@ -6570,6 +6570,7 @@ void emitter::emitIns_SS_R_R_R_I(instruction ins,
     {
         id = emitNewInstrLclVarPair(attr, imm);
         id->idAddr()->iiaLclVar.initLclVarAddr(varx1, offs);
+        id->idSetIsLclVar();
 
         if (id->idSmallCns())
         {
@@ -6586,10 +6587,12 @@ void emitter::emitIns_SS_R_R_R_I(instruction ins,
         if (validVar1)
         {
             id->idAddr()->iiaLclVar.initLclVarAddr(varx1, offs);
+            id->idSetIsLclVar();
         }
         if (validVar2)
         {
             id->idAddr()->iiaLclVar.initLclVarAddr(varx2, offs);
+            id->idSetIsLclVar();
         }
     }
 

Original file line number	Diff line number	Diff line change
`@@ -6570,6 +6570,7 @@ void emitter::emitIns_SS_R_R_R_I(instruction ins,`
`6570`	`6570`	`{`
`6571`	`6571`	`id = emitNewInstrLclVarPair(attr, imm);`
`6572`	`6572`	`id->idAddr()->iiaLclVar.initLclVarAddr(varx1, offs);`
	`6573`	`+ id->idSetIsLclVar();`
`6573`	`6574`
`6574`	`6575`	`if (id->idSmallCns())`
`6575`	`6576`	`{`
`@@ -6586,10 +6587,12 @@ void emitter::emitIns_SS_R_R_R_I(instruction ins,`
`6586`	`6587`	`if (validVar1)`
`6587`	`6588`	`{`
`6588`	`6589`	`id->idAddr()->iiaLclVar.initLclVarAddr(varx1, offs);`
	`6590`	`+ id->idSetIsLclVar();`
`6589`	`6591`	`}`
`6590`	`6592`	`if (validVar2)`
`6591`	`6593`	`{`
`6592`	`6594`	`id->idAddr()->iiaLclVar.initLclVarAddr(varx2, offs);`
	`6595`	`+ id->idSetIsLclVar();`
`6593`	`6596`	`}`
`6594`	`6597`	`}`
`6595`	`6598`