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feat(classifiers): implement ClassifierMetrics with p50/p95 latency ring buffer #2249
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P3Research — medium-high complexityResearch — medium-high complexityenhancementNew feature or requestNew feature or requestllmzeph-llm crate (Ollama, Claude)zeph-llm crate (Ollama, Claude)
Description
Context
Identified during Phase 2 (#2200) impl-critique as M2 (non-blocking).
Problem
Phase 2 architecture spec (section 6.3) called for a ClassifierMetrics struct with per-task-type p50/p95 latency ring buffers, emitted as structured tracing spans. Currently, only tracing::debug! latency logging is implemented — no ring buffer, no percentile aggregation, not surfaced in TUI metrics panel.
Expected
ClassifierMetricsstruct with per-ClassifierTaskring buffer (configurable size, default 100)- p50 and p95 computed on demand from ring buffer
- Metrics emitted via
tracing::info!with structured fields for TUI consumption - TUI metrics panel shows classifier latency alongside existing LLM/memory metrics
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P3Research — medium-high complexityResearch — medium-high complexityenhancementNew feature or requestNew feature or requestllmzeph-llm crate (Ollama, Claude)zeph-llm crate (Ollama, Claude)