Fix: Enlarge dummy buffer for SVE predicated loads to fix MSan false positive#307
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ashvardanian merged 1 commit intoashvardanian:main-devfrom Mar 7, 2026
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…positive
`simsimd_capabilities` probes SIMD functions with `n=0` to pre-initialize
dispatch function pointers. SVE implementations use `do { } while (i < n)`
loops that always execute the body once, even with `n=0`. MemorySanitizer
instruments SVE predicated loads (`svld1_f32` etc.) as full-width vector
reads regardless of the predicate mask, so it reports use-of-uninitialized
memory when the buffer is smaller than the SIMD register width.
Increase the dummy buffer from 8 bytes (`double[1]`) to 256 bytes
(`double[32]`) to cover the widest possible SVE vector (2048 bits).
Co-Authored-By: Claude Opus 4.6 <[email protected]>
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Summary
simsimd_capabilitiesprobes SIMD functions withn=0to pre-initialize dispatch function pointers. SVE implementations usedo { } while (i < n)loops that always execute the body once, even withn=0. MemorySanitizer instruments SVE predicated loads (svld1_f32etc.) as full-width vector reads regardless of the predicate mask, so it reports use-of-uninitialized memory when the buffer is smaller than the SIMD register width.Increase the dummy buffer from 8 bytes (
double[1]) to 256 bytes (double[32]) to cover the widest possible SVE vector (2048 bits).This is a follow-up to #302 which initialized the buffer to zero but kept it at only 1 element.
CI report from ClickHouse's ARM MSan stress test: https://s3.amazonaws.com/clickhouse-test-reports/json.html?PR=98677&sha=a1b9d7f6170c510431fce962a869aa617d88d888&name_0=PR&name_1=Stress%20test%20%28arm_msan%29