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Rishabh BhatnagarAndy Gross
Rishabh Bhatnagar
authored and
Andy Gross
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drivers: soc: Add LLCC driver
LLCC (Last Level Cache Controller) provides additional cache memory in the system. LLCC is partitioned into multiple slices and each slice gets its own priority, size, ID and other config parameters. LLCC driver programs these parameters for each slice. Clients that are assigned to use LLCC need to get information such size & ID of the slice they get and activate or deactivate the slice as needed. LLCC driver provides API for the clients to perform these operations. Signed-off-by: Channagoud Kadabi <[email protected]> Signed-off-by: Rishabh Bhatnagar <[email protected]> Reviewed-by: Evan Green <[email protected]> Reviewed-by: Rob Herring <[email protected]> Reviewed-by: Bjorn Andersson <[email protected]> Signed-off-by: Andy Gross <[email protected]>
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‎drivers/soc/qcom/Kconfig‎

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@@ -39,6 +39,23 @@ config QCOM_GSBI
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functions for connecting the underlying serial UART, SPI, and I2C
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devices to the output pins.
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config QCOM_LLCC
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tristate "Qualcomm Technologies, Inc. LLCC driver"
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depends on ARCH_QCOM
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help
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Qualcomm Technologies, Inc. platform specific
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Last Level Cache Controller(LLCC) driver. This provides interfaces
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to clients that use the LLCC. Say yes here to enable LLCC slice
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driver.
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config QCOM_SDM845_LLCC
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tristate "Qualcomm Technologies, Inc. SDM845 LLCC driver"
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depends on QCOM_LLCC
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help
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Say yes here to enable the LLCC driver for SDM845. This provides
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data required to configure LLCC so that clients can start using the
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LLCC slices.
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config QCOM_MDT_LOADER
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tristate
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select QCOM_SCM

‎drivers/soc/qcom/Makefile‎

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@@ -15,3 +15,5 @@ obj-$(CONFIG_QCOM_SMP2P) += smp2p.o
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obj-$(CONFIG_QCOM_SMSM) += smsm.o
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obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
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obj-$(CONFIG_QCOM_APR) += apr.o
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obj-$(CONFIG_QCOM_LLCC) += llcc-slice.o
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obj-$(CONFIG_QCOM_SDM845_LLCC) += llcc-sdm845.o

‎drivers/soc/qcom/llcc-sdm845.c‎

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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/soc/qcom/llcc-qcom.h>
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/*
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* SCT(System Cache Table) entry contains of the following members:
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* usecase_id: Unique id for the client's use case
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* slice_id: llcc slice id for each client
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* max_cap: The maximum capacity of the cache slice provided in KB
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* priority: Priority of the client used to select victim line for replacement
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* fixed_size: Boolean indicating if the slice has a fixed capacity
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* bonus_ways: Bonus ways are additional ways to be used for any slice,
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* if client ends up using more than reserved cache ways. Bonus
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* ways are allocated only if they are not reserved for some
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* other client.
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* res_ways: Reserved ways for the cache slice, the reserved ways cannot
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* be used by any other client than the one its assigned to.
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* cache_mode: Each slice operates as a cache, this controls the mode of the
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* slice: normal or TCM(Tightly Coupled Memory)
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* probe_target_ways: Determines what ways to probe for access hit. When
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* configured to 1 only bonus and reserved ways are probed.
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* When configured to 0 all ways in llcc are probed.
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* dis_cap_alloc: Disable capacity based allocation for a client
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* retain_on_pc: If this bit is set and client has maintained active vote
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* then the ways assigned to this client are not flushed on power
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* collapse.
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* activate_on_init: Activate the slice immediately after the SCT is programmed
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*/
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#define SCT_ENTRY(uid, sid, mc, p, fs, bway, rway, cmod, ptw, dca, rp, a) \
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{ \
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.usecase_id = uid, \
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.slice_id = sid, \
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.max_cap = mc, \
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.priority = p, \
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.fixed_size = fs, \
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.bonus_ways = bway, \
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.res_ways = rway, \
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.cache_mode = cmod, \
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.probe_target_ways = ptw, \
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.dis_cap_alloc = dca, \
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.retain_on_pc = rp, \
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.activate_on_init = a, \
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}
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static struct llcc_slice_config sdm845_data[] = {
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SCT_ENTRY(LLCC_CPUSS, 1, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 1),
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SCT_ENTRY(LLCC_VIDSC0, 2, 512, 2, 1, 0x0, 0x0f0, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_VIDSC1, 3, 512, 2, 1, 0x0, 0x0f0, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_ROTATOR, 4, 563, 2, 1, 0x0, 0x00e, 2, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_VOICE, 5, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_AUDIO, 6, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_MDMHPGRW, 7, 1024, 2, 0, 0xfc, 0xf00, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_MDM, 8, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_CMPT, 10, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_GPUHTW, 11, 512, 1, 1, 0xc, 0x0, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_GPU, 12, 2304, 1, 0, 0xff0, 0x2, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_MMUHWT, 13, 256, 2, 0, 0x0, 0x1, 0, 0, 1, 0, 1),
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SCT_ENTRY(LLCC_CMPTDMA, 15, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_DISP, 16, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_VIDFW, 17, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_MDMHPFX, 20, 1024, 2, 1, 0x0, 0xf00, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_MDMPNG, 21, 1024, 0, 1, 0x1e, 0x0, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_AUDHW, 22, 1024, 1, 1, 0xffc, 0x2, 0, 0, 1, 1, 0),
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};
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static int sdm845_qcom_llcc_probe(struct platform_device *pdev)
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{
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return qcom_llcc_probe(pdev, sdm845_data, ARRAY_SIZE(sdm845_data));
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}
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static const struct of_device_id sdm845_qcom_llcc_of_match[] = {
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{ .compatible = "qcom,sdm845-llcc", },
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{ }
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};
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static struct platform_driver sdm845_qcom_llcc_driver = {
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.driver = {
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.name = "sdm845-llcc",
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.of_match_table = sdm845_qcom_llcc_of_match,
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},
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.probe = sdm845_qcom_llcc_probe,
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};
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module_platform_driver(sdm845_qcom_llcc_driver);
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MODULE_DESCRIPTION("QCOM sdm845 LLCC driver");
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MODULE_LICENSE("GPL v2");

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