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drm/mgag200: Store values (not bits) in struct mgag200_pll_values
The fields in struct mgag200_pll_values currently hold the bits of each register. Store the PLL values instead and let the PLL-update code figure out the bits for each register. Until now, the compute function either stored plain values or register bits in struct mgag200_pll_values. The rsp update function used the values as-is. This made it very hard to correctly interpret the stored values (e.g., for logging or debugging). With the cleanup, the stored values now have a clear meaning. v2: * add a bit more context in the commit message (Sam) Signed-off-by: Thomas Zimmermann <[email protected]> Acked-by: Sam Ravnborg <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
1 parent d9d9922 commit 2dd0409

1 file changed

Lines changed: 91 additions & 62 deletions

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‎drivers/gpu/drm/mgag200/mgag200_mode.c‎

Lines changed: 91 additions & 62 deletions
Original file line numberDiff line numberDiff line change
@@ -123,7 +123,7 @@ static int mgag200_compute_pixpll_values_g200(struct mga_device *mdev, long cloc
123123
const int in_div_max = 6;
124124
const int feed_div_min = 7;
125125
const int feed_div_max = 127;
126-
u8 testm, testn;
126+
u8 testp, testm, testn;
127127
u8 n = 0, m = 0, p, s;
128128
long f_vco;
129129
long computed;
@@ -141,10 +141,11 @@ static int mgag200_compute_pixpll_values_g200(struct mga_device *mdev, long cloc
141141
clock = p_clk_min >> 3;
142142

143143
f_vco = clock;
144-
for (p = 0;
145-
p <= post_div_max && f_vco < p_clk_min;
146-
p = (p << 1) + 1, f_vco <<= 1)
144+
for (testp = 0;
145+
testp <= post_div_max && f_vco < p_clk_min;
146+
testp = (testp << 1) + 1, f_vco <<= 1)
147147
;
148+
p = testp + 1;
148149

149150
delta = clock;
150151

@@ -157,12 +158,12 @@ static int mgag200_compute_pixpll_values_g200(struct mga_device *mdev, long cloc
157158
tmp_delta = computed - f_vco;
158159
if (tmp_delta < delta) {
159160
delta = tmp_delta;
160-
m = testm;
161-
n = testn;
161+
m = testm + 1;
162+
n = testn + 1;
162163
}
163164
}
164165
}
165-
f_vco = ref_clk * (n + 1) / (m + 1);
166+
f_vco = ref_clk * n / m;
166167
if (f_vco < 100000)
167168
s = 0;
168169
else if (f_vco < 140000)
@@ -186,11 +187,17 @@ static int mgag200_compute_pixpll_values_g200(struct mga_device *mdev, long cloc
186187
static void mgag200_set_pixpll_g200(struct mga_device *mdev,
187188
const struct mgag200_pll_values *pixpllc)
188189
{
190+
unsigned int pixpllcm, pixpllcn, pixpllcp, pixpllcs;
189191
u8 xpixpllcm, xpixpllcn, xpixpllcp;
190192

191-
xpixpllcm = pixpllc->m;
192-
xpixpllcn = pixpllc->n;
193-
xpixpllcp = pixpllc->p | (pixpllc->s << 3);
193+
pixpllcm = pixpllc->m - 1;
194+
pixpllcn = pixpllc->n - 1;
195+
pixpllcp = pixpllc->p - 1;
196+
pixpllcs = pixpllc->s;
197+
198+
xpixpllcm = pixpllcm;
199+
xpixpllcn = pixpllcn;
200+
xpixpllcp = (pixpllcs << 3) | pixpllcp;
194201

195202
WREG_MISC_MASKED(MGAREG_MISC_CLKSEL_MGA, MGAREG_MISC_CLKSEL_MASK);
196203

@@ -238,9 +245,9 @@ static int mgag200_compute_pixpll_values_g200se(struct mga_device *mdev, long cl
238245
tmpdelta = clock - computed;
239246
if (tmpdelta < delta) {
240247
delta = tmpdelta;
241-
m = testm - 1;
242-
n = testn - 1;
243-
p = testp - 1;
248+
m = testm;
249+
n = testn;
250+
p = testp;
244251
}
245252
}
246253
}
@@ -278,22 +285,19 @@ static int mgag200_compute_pixpll_values_g200se(struct mga_device *mdev, long cl
278285

279286
if (tmpdelta < delta) {
280287
delta = tmpdelta;
281-
m = testm - 1;
282-
n = testn - 1;
283-
p = testp - 1;
288+
m = testm;
289+
n = testn;
290+
p = testp;
284291
}
285292
}
286293
}
287294
}
288295

289-
fvv = pllreffreq * (n + 1) / (m + 1);
296+
fvv = pllreffreq * n / m;
290297
fvv = (fvv - 800000) / 50000;
291-
292298
if (fvv > 15)
293299
fvv = 15;
294-
295-
p |= (fvv << 4);
296-
m |= 0x80;
300+
s = fvv << 1;
297301

298302
clock = clock / 2;
299303
}
@@ -315,11 +319,17 @@ static void mgag200_set_pixpll_g200se(struct mga_device *mdev,
315319
const struct mgag200_pll_values *pixpllc)
316320
{
317321
u32 unique_rev_id = mdev->model.g200se.unique_rev_id;
322+
unsigned int pixpllcm, pixpllcn, pixpllcp, pixpllcs;
318323
u8 xpixpllcm, xpixpllcn, xpixpllcp;
319324

320-
xpixpllcm = pixpllc->m;
321-
xpixpllcn = pixpllc->n;
322-
xpixpllcp = pixpllc->p | (pixpllc->s << 3);
325+
pixpllcm = pixpllc->m - 1;
326+
pixpllcn = pixpllc->n - 1;
327+
pixpllcp = pixpllc->p - 1;
328+
pixpllcs = pixpllc->s;
329+
330+
xpixpllcm = pixpllcm | ((pixpllcn & BIT(8)) >> 1);
331+
xpixpllcn = pixpllcn;
332+
xpixpllcp = (pixpllcs << 3) | pixpllcp;
323333

324334
WREG_MISC_MASKED(MGAREG_MISC_CLKSEL_MGA, MGAREG_MISC_CLKSEL_MASK);
325335

@@ -348,7 +358,6 @@ static int mgag200_compute_pixpll_values_g200wb(struct mga_device *mdev, long cl
348358
delta = 0xffffffff;
349359

350360
if (mdev->type == G200_EW3) {
351-
352361
vcomax = 800000;
353362
vcomin = 400000;
354363
pllreffreq = 25000;
@@ -371,19 +380,16 @@ static int mgag200_compute_pixpll_values_g200wb(struct mga_device *mdev, long cl
371380
tmpdelta = clock - computed;
372381
if (tmpdelta < delta) {
373382
delta = tmpdelta;
374-
m = ((testn & 0x100) >> 1) |
375-
(testm);
376-
n = (testn & 0xFF);
377-
p = ((testn & 0x600) >> 3) |
378-
(testp2 << 3) |
379-
(testp);
383+
m = testm + 1;
384+
n = testn + 1;
385+
p = testp + 1;
386+
s = testp2;
380387
}
381388
}
382389
}
383390
}
384391
}
385392
} else {
386-
387393
vcomax = 550000;
388394
vcomin = 150000;
389395
pllreffreq = 48000;
@@ -404,10 +410,10 @@ static int mgag200_compute_pixpll_values_g200wb(struct mga_device *mdev, long cl
404410
tmpdelta = clock - computed;
405411
if (tmpdelta < delta) {
406412
delta = tmpdelta;
407-
n = testn - 1;
408-
m = (testm - 1) |
409-
((n >> 1) & 0x80);
410-
p = testp - 1;
413+
n = testn;
414+
m = testm;
415+
p = testp;
416+
s = 0;
411417
}
412418
}
413419
}
@@ -425,13 +431,19 @@ static int mgag200_compute_pixpll_values_g200wb(struct mga_device *mdev, long cl
425431
static void mgag200_set_pixpll_g200wb(struct mga_device *mdev,
426432
const struct mgag200_pll_values *pixpllc)
427433
{
434+
unsigned int pixpllcm, pixpllcn, pixpllcp, pixpllcs;
428435
u8 xpixpllcm, xpixpllcn, xpixpllcp, tmp;
429436
int i, j, tmpcount, vcount;
430437
bool pll_locked = false;
431438

432-
xpixpllcm = pixpllc->m;
433-
xpixpllcn = pixpllc->n;
434-
xpixpllcp = pixpllc->p | (pixpllc->s << 3);
439+
pixpllcm = pixpllc->m - 1;
440+
pixpllcn = pixpllc->n - 1;
441+
pixpllcp = pixpllc->p - 1;
442+
pixpllcs = pixpllc->s;
443+
444+
xpixpllcm = ((pixpllcn & BIT(8)) >> 1) | pixpllcm;
445+
xpixpllcn = pixpllcn;
446+
xpixpllcp = ((pixpllcn & GENMASK(10, 9)) >> 3) | (pixpllcs << 3) | pixpllcp;
435447

436448
WREG_MISC_MASKED(MGAREG_MISC_CLKSEL_MGA, MGAREG_MISC_CLKSEL_MASK);
437449

@@ -564,9 +576,9 @@ static int mgag200_compute_pixpll_values_g200ev(struct mga_device *mdev, long cl
564576
tmpdelta = clock - computed;
565577
if (tmpdelta < delta) {
566578
delta = tmpdelta;
567-
n = testn - 1;
568-
m = testm - 1;
569-
p = testp - 1;
579+
n = testn;
580+
m = testm;
581+
p = testp;
570582
}
571583
}
572584
}
@@ -583,11 +595,17 @@ static int mgag200_compute_pixpll_values_g200ev(struct mga_device *mdev, long cl
583595
static void mgag200_set_pixpll_g200ev(struct mga_device *mdev,
584596
const struct mgag200_pll_values *pixpllc)
585597
{
598+
unsigned int pixpllcm, pixpllcn, pixpllcp, pixpllcs;
586599
u8 xpixpllcm, xpixpllcn, xpixpllcp, tmp;
587600

588-
xpixpllcm = pixpllc->m;
589-
xpixpllcn = pixpllc->n;
590-
xpixpllcp = pixpllc->p | (pixpllc->s << 3);
601+
pixpllcm = pixpllc->m - 1;
602+
pixpllcn = pixpllc->n - 1;
603+
pixpllcp = pixpllc->p - 1;
604+
pixpllcs = pixpllc->s;
605+
606+
xpixpllcm = pixpllcm;
607+
xpixpllcn = pixpllcn;
608+
xpixpllcp = (pixpllcs << 3) | pixpllcp;
591609

592610
WREG_MISC_MASKED(MGAREG_MISC_CLKSEL_MGA, MGAREG_MISC_CLKSEL_MASK);
593611

@@ -675,9 +693,9 @@ static int mgag200_compute_pixpll_values_g200eh(struct mga_device *mdev, long cl
675693
tmpdelta = clock - computed;
676694
if (tmpdelta < delta) {
677695
delta = tmpdelta;
678-
n = testn;
679-
m = testm;
680-
p = testp;
696+
n = testn + 1;
697+
m = testm + 1;
698+
p = testp + 1;
681699
}
682700
if (delta == 0)
683701
break;
@@ -709,12 +727,10 @@ static int mgag200_compute_pixpll_values_g200eh(struct mga_device *mdev, long cl
709727
tmpdelta = clock - computed;
710728
if (tmpdelta < delta) {
711729
delta = tmpdelta;
712-
n = testn - 1;
713-
m = (testm - 1);
714-
p = testp - 1;
730+
n = testn;
731+
m = testm;
732+
p = testp;
715733
}
716-
if ((clock * testp) >= 600000)
717-
p |= 0x80;
718734
}
719735
}
720736
}
@@ -731,13 +747,19 @@ static int mgag200_compute_pixpll_values_g200eh(struct mga_device *mdev, long cl
731747
static void mgag200_set_pixpll_g200eh(struct mga_device *mdev,
732748
const struct mgag200_pll_values *pixpllc)
733749
{
750+
unsigned int pixpllcm, pixpllcn, pixpllcp, pixpllcs;
734751
u8 xpixpllcm, xpixpllcn, xpixpllcp, tmp;
735752
int i, j, tmpcount, vcount;
736753
bool pll_locked = false;
737754

738-
xpixpllcm = pixpllc->m;
739-
xpixpllcn = pixpllc->n;
740-
xpixpllcp = pixpllc->p | (pixpllc->s << 3);
755+
pixpllcm = pixpllc->m - 1;
756+
pixpllcn = pixpllc->n - 1;
757+
pixpllcp = pixpllc->p - 1;
758+
pixpllcs = pixpllc->s;
759+
760+
xpixpllcm = ((pixpllcn & BIT(8)) >> 1) | pixpllcm;
761+
xpixpllcn = pixpllcn;
762+
xpixpllcp = (pixpllcs << 3) | pixpllcp;
741763

742764
WREG_MISC_MASKED(MGAREG_MISC_CLKSEL_MGA, MGAREG_MISC_CLKSEL_MASK);
743765

@@ -830,9 +852,10 @@ static int mgag200_compute_pixpll_values_g200er(struct mga_device *mdev, long cl
830852
tmpdelta = clock - computed;
831853
if (tmpdelta < delta) {
832854
delta = tmpdelta;
833-
m = testm | (testo << 3);
834-
n = testn;
835-
p = testr | (testr << 3);
855+
m = (testm | (testo << 3)) + 1;
856+
n = testn + 1;
857+
p = testr + 1;
858+
s = testr;
836859
}
837860
}
838861
}
@@ -850,11 +873,17 @@ static int mgag200_compute_pixpll_values_g200er(struct mga_device *mdev, long cl
850873
static void mgag200_set_pixpll_g200er(struct mga_device *mdev,
851874
const struct mgag200_pll_values *pixpllc)
852875
{
876+
unsigned int pixpllcm, pixpllcn, pixpllcp, pixpllcs;
853877
u8 xpixpllcm, xpixpllcn, xpixpllcp, tmp;
854878

855-
xpixpllcm = pixpllc->m;
856-
xpixpllcn = pixpllc->n;
857-
xpixpllcp = pixpllc->p | (pixpllc->s << 3);
879+
pixpllcm = pixpllc->m - 1;
880+
pixpllcn = pixpllc->n - 1;
881+
pixpllcp = pixpllc->p - 1;
882+
pixpllcs = pixpllc->s;
883+
884+
xpixpllcm = pixpllcm;
885+
xpixpllcn = pixpllcn;
886+
xpixpllcp = (pixpllcs << 3) | pixpllcp;
858887

859888
WREG_MISC_MASKED(MGAREG_MISC_CLKSEL_MGA, MGAREG_MISC_CLKSEL_MASK);
860889

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