"DHRYSTONE" Benchmark Program by Reinhold P. Weicker
- This repository is for implementing Dhrystone 2.1 on Bare-metal RISC-V RV32I Processors.
- The main contents will be written in README.md.
- The files that repository provides will be the 'ready to takeoff' state Dhrystone 2.1 for any RV32I bare-metal processor
(should support UART TX, MMIO.) - For performance evaluation, your processor needs Zicsr extension with supporting
mcycle(h),minstret(h)CSR.
Target processor is basic_RV32s' 46F5SP_MMIO_SoC, which is based on RV32I46F_5SP core design.
(RV32I_Zicsr with 46 Instructions support, 5-Stage Pipelined In-order processor)
RV32I except fence, fence.tso, pause = 39 instructions for RV32I, 6 instructions for Zicsr, 1 instruction from privileged architecture: mret
The processor's Memory map is same as following.
- IMEM(ROM) : 0x0000_0000, 64KB (0:16383)
- DMEM(RAM) : 0x1000_0000, 32KB (0:8191)
- UART_TX : 0x1001_0000
- UART_STATUS_ADDRESS : 0x1001_0004
- Clone the toolchain repository. 먼저 클론을 따준다.
cd ~
git clone https://github.com/riscv-collab/riscv-gnu-toolchain.git
cd riscv-gnu-toolchain- Install dependency packages. 의존성 패키지들을 설치해준다.
sudo apt-get update
sudo apt-get install -y autoconf automake autotools-dev curl python3 python3-pip python3-tomli libmpc-dev libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf libtool patchutils bc zlib1g-dev libexpat-dev ninja-build git cmake libglib2.0-dev libslirp-dev- Configure the toolchain build.
여기서부터가 중요하다. 현재 있는 툴체인 폴더에서, configure를 진행해준다.
cd ~/riscv-gnu-toolchain
./configure --prefix=$HOME/riscv32i-elf --target=riscv32-unknown-elf --with-arch=rv32i --with-abi=ilp32riscv32i-elf is the directory where toolchain is built. You can change this directory if needed.
Official manual does with the /opt/riscv directory.
여기서 riscv32i-elf는 툴체인이 빌드 될 디렉토리다. 원하는 폴더명이나 경로로 바꿔도 좋다.
매뉴얼에서는(공식 깃헙 페이지) /opt/riscv로 한다.
- make
make -j$(nproc)- Confirm and register PATH. 확인 및 PATH 등록
ls $HOME/riscv32i-elf/bin | grep riscv32-unknown-elf-gccecho 'export PATH=$HOME/riscv32i-elf/bin:$PATH' >> ~/.bashrc
source ~/.bashrcriscv32-unknown-elf-gcc -vDone.
끝.
이제 어떤 파일이든 RV32I에 맞게 컴파일할 수 있다.
Our repository provides:
- Dhrystone 2.1 Source codes (From SiFive)
- dhry.h
- dhry_1.c
- dhry_2.c
- Files for compiling Dhrystone 2.1
- crt0.s
- linker.ld
- Makefile
- mini_libc.c
- strcmp.S
- syscalls.c
- sys/
- times.h
- Utility program
- bin2mem.py
There are no modifications for the dhrystone source codes.
Only the files for compiling is added and these are all we need to make Dhrystone 2.1.
git clone https://github.com/T410N/dhrystone-rv32i-baremetal.git
cd dhrystone-rv32i-baremetal
make clean
makeAnd if you want to convert the output dhrystone.bin to .mem, use bin2mem.py.
chmod +x bin2mem.py
./bin2mem.py dhrystone.bin dhrystone.mem or
python3 bin2mem.py dhrystone.bin dhrystone.mem Notes
SiFive provided version of Dhrystone 2.1 forces benchmark to last at least 2 seconds.
If the benchmark is done below the time limit, the benchmark will return the following message.
Measured time too small to obtain meaningful results. Please increase number of runs.
For 50MHz, we've benchmarked with 300,000 iterations, and also forcefully ignored the time limit and done with the 2,000 iterations too.
Result is same as following, and if you did things correctly, these are the screen that you should receive.
If you are receiving results like this, you should check the Tera Term's settings > Terminal > line break(word wrap... etc) and make sure it's AUTO. :