sam0/spi: fix SPI mode assignment#9885
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PeterKietzmann merged 1 commit intoRIOT-OS:masterfrom Sep 10, 2018
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Signed-off-by: dylad <[email protected]>
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Type: bug
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@miri64 Any idea why Murdock complains here ? this is outside the scope of this PR right ? |
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I retrigger Murdock and the previous error vanish... |
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@leandrolanzieri the code change seems reasonable. Can you confirm that it fixes #9695? |
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@PeterKietzmann yes, I scoped the signals and everything is looking good. |
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Great, thanks! |
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Contribution description
This PR provides a fix for #9695
The SPI mode selection is done using two bits in the SERCOM CTRLA register, bit 28 and bit 29.
The mode variable can be 0, 1, 2 or 3 but this variable was shifted to bit 29 instead of bit 28 (CPOL instead of CPHA) so the SPI mode was not set correctly.
More info in #9695
Thanks @leandrolanzieri for spotting this issue.
Testing procedure
Issues/PRs references