drivers/periph: reworked the ADC driver#4430
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cpu/stm32f4/periph/adc.c
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Please note that if you disable the ADC clock you will reset it's configuration to reset state. This means the ADC will be unconfigured next time you call adc_sample. Don't know if that was intended?
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are you sure about this? As far as I know does the configuration stay if you disable the clock
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Maybe you are right and am I confused with the RCC RST register.
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Clean solution :) This would also work for the L1, F0, F1 and maybe the F3 (don't have that one) |
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backported the @DipSwitch, @PeterKietzmann: are you in line with these changes? |
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ACK
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cpu/stm32f4/periph/adc.c
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Just asking: Wasn't there also APB1ENR for some ports or pins?
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just re-checked: all F4s supported by RIOT currently have the ADC periphs connected to the APB1 bus
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For the F(1|3)'s this is also the case, and probably also for the F0 and L series it's some sort of a business model :p
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@haukepetersen the change looks reasonable and "similar" to other periph driver optimizations. I did not review or test in detail right now. |
cpu/stm32f4/periph/adc.c
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Maybe you would also like to calculate the maximum allowed clock speed compile time.
/* calculate the maximum allowed ADC clock speed (12Mhz) */
uint32_t devider = 2;
for (; devider < 8; devider += 2) {
if ((CLOCK_CORECLOCK / devider) <= 12000000) {
break;
}
}
devider = ((devider / 2) - 1) << 16;
/* set clock prescaler */
RCC->CCR &= ~(ADC_CCR_ADCPRE);
RCC->CCR |= devider;
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Hm, I would rather configure the preferred divider in the periph_conf.h to save code size
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Since CLOCK_CORECLOCK is a constant, the compiler optimized the for loop away and replaces it with a constant ;)
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sure about that? Recently I started to doubt the compile a little bit when doing some code size analyses... But there is only one way to find out - I will give this a try. If optimization works as expected, this patch would definitely make sense
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Jep, you were right, added this to the code.
To enable 16 and 17 you need to set
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cpu/stm32f4/periph/adc.c
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/* check if the linenel is valid */
if (line >= ADC_NUMOF) {
return -1;
}
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nope. The paradigm for the periph drivers is: check the device for correctnes in the init function and assume it to be correct in all other functions. This saves quite some instructions and memory...
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About the internal ADC values and sample time: Let's discuss this in another PR... |
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squashed |
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Sorry missed that, killed the previous travis build (which is still building) and make it build the new commit :) |
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Nope, there are still some |
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I can't see them, did you update your view? |
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I did, but probably there was a delay in github, they are gone now and travis builds the latest version. ^_^ |
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Murdock agree's, do we wait for Travis? |
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As decided this morning -> if Murdock is good, go... |
drivers/periph: reworked the ADC driver
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(I took @DipSwitch's comment as implicit ACK if not, I ack'd it implicitly by merging.) |
This is a proposal for a reworked and simplified ADC driver interface, introducing the concept of logical ADC lines. This should separate the former used logical channels and the CPU internal channels now clearly from each other, leading to less confusion when implementing this interface.
This remodeled interface has exactly the same feature set than the former interface, so only support for non-sequential, one-shot conversions for now.
Enhancements are:
power_xxfunctions from interface (made them implicit now)A sample implementation for the
stm32f4(discovery)is attached, also the test application is already adapted.