Support for Freescale Kinetis MCUs, kinetis_common by jfischer-no · Pull Request #2265 · RIOT-OS/RIOT

jfischer-no · 2015-01-08T08:09:58Z

PRs/MCUs depend on kinetis_common:

RIOT port for the KW22D512 SiP, RIOT port for the MKW22D512 SiP and Phytec PBA-D-01 PhyWave Evaluations-Board #2059 and driver: RIOT port for the Freescale kw2x radio #2329
RIOT port for the Kinetis KW01Z128 SiP,RIOT port for the KW01Z128 SiP and Phytec PhyWave-KW01 Evaluations-Board #2328
RIOT port for the Kinetis K60 CPUs, Add support for Kinetis K60 CPUs and Eistec Mulle IoT board #2282
RIOT port for the Kinetis K20 CPUs, Add support for Freescale K20 MCUs and the mchck board #2271

jnohlgard · 2015-01-08T09:47:16Z

cpu/kinetis_common/timer.c

Why do we freeze the timer here? I can not find an instance below where the FRZ flag is turned off again.

This allows the timers to be stopped when the device enters the Debug mode. (MKW2xD RM).

ups, PIT code is a little neglected. I wanted to remove it, because it does not fit in function to riot. Maybe I will find time to rewrite it on the weekend.

Sorry, I mixed up the FRZ and MDIS flags.

jnohlgard · 2015-01-09T08:19:01Z

I will do a more thorough review during the weekend or beginning of the next week. The code seems to work on my K60 board as well as @jfischer-phytec-iot 's KW22 board.

jfischer-no · 2015-01-09T09:30:51Z

During the porting to kw01z128 I had some problems with identifiers of IRQs (lptmr). It can be resolved if one uses the latest CMSIS compliant header filer. (Contact your FAE to get a newest 😄 )

I currently work at the UART code, there are 3 slightly different UARTs for kinetis MCUs.

jnohlgard · 2015-01-09T13:18:37Z

cpu/kinetis_common/uart.c

The logic seem wrong. TX interrupt is supposed to be disabled if return value is zero. dev->C2 &= ~(1 << UART_C2_TIE_SHIFT); (or shorter: dev->C2 &= ~(UART_C2_TIE_MASK);)

See also: http://riot-os.org/api/group__driver__periph__uart.html#ga2aa1686d28caae1aa74baa3d047e8330

You are right, corrected.

jnohlgard · 2015-01-10T18:34:17Z

I have been working on this with my K60 port during the day, so far I have successfully used the following modules:

cpuid
random (See jfischer-phytec-iot/RIOT#3 )
uart
hwtimer (See jfischer-phytec-iot/RIOT#3 )

Still some more work to be done on my part for testing the rest of the stuff.

jnohlgard · 2015-01-11T11:59:25Z

@Farthen Regarding PIT timers: The timers are always running at the Bus clock frequency, in order to allow for variable frequency it is possible to use one timer as a divider/counter and chain two timers together. What the timer module does is that it counts ticks_per_usec ticks on one timer, and every time that timer overflows, the second timer decreases by one, effectively making the second timer run at 1 MHz. This is why we can only use two timers even though the hardware has four timer/counters.

jnohlgard · 2015-01-11T15:00:38Z

@jfischer-phytec-iot Looking at the SPI driver. I think it can be merged as is, but I would like to suggest some changes to the configuration. I would like to use the two CTAR registers in a different way, in order to be able to communicate with multiple devices with different signal polarities or timings without having to reinitialize the driver over and over.

I realize that currently there is no configuration at all, everything is hard coded. I will open a PR later if I find a way to provide a suitable API for the change...

jnohlgard · 2015-01-12T10:05:42Z

@Farthen Please write your comments in the "Files Changed" tab, that way the comments and a code snippet will be inlined in the discussion thread for the PR on #2265
I agree that the text in the code is wrong, it should be either 32.768 kHz or 32768 Hz.

felinira · 2015-01-15T13:45:44Z

cpu/kinetis_common/hwtimer_arch.c

This should enable MCGIRCLK first, as this is not the default.

MCG->C1 |= MCG_C1_IRCLKEN_MASK; // For fast internal clock MCG->C2 |= MCG_C2_IRCS_MASK; while(!(MCG->S & MCG_S_IRCST_MASK));

But that is a option for MCG driver or your cpu_clock_init, not for LPTMR driver.

jnohlgard · 2015-01-20T13:05:58Z

@jfischer-phytec-iot Could you rebase kinetis_common to latest master?

(Since #2290 and #2323 have been merged)

jnohlgard · 2015-01-21T18:59:07Z

cpu/kinetis_common/adc.c

Change to @ingroup cpu_kinetis_common, put the textual description of the group in the @defgroup command, create a doc.txt similar to what some other CPU directories have.

This applies for all other uses of @addtogroup cpu_kinetis_common below as well. (I won't put a comment on every one, they are too many)

jnohlgard · 2015-01-30T14:28:54Z

cpu/kinetis_common/adc.c

For each case, add:

adc_config[dev].max_value = (1 << numbits) - 1;

jnohlgard · 2015-01-30T15:14:18Z

I noticed some issues with the ADC driver when using it on the K60. Some of the analog pins on the K60 are not configurable through the pin mux and do not have a corresponding PORTx->PCR entry. I will add support for ADC_x_CHy_PORT == 0 to tell the driver to skip pin mux configuration.
The reason that I want these pins so bad is that they are also the ADC pins which have the greatest analog functionality, such as programmable gain and differential input.

@jfischer-phytec-iot I will take care of the issues in the ADC driver and open a PR against your branch (this PR) when I have fixed it. See above for my other comments on the other kinetis_common drivers.

jfischer-no · 2015-01-30T15:32:14Z

@gebart ok

jnohlgard · 2015-02-01T09:56:04Z

@jfischer-phytec-iot
ADC refactor PR: https://github.com/jfischer-phytec-iot/RIOT/pull/12

jnohlgard · 2015-02-01T11:44:16Z

cpu/kinetis_common/include/mcg.h

Replace by an extern declaration (if this is indeed used in any other files than mcg.c):

extern uint32_t cpufreq;

cpufreq is a zombie, it was planned that the mcg driver calculates current cpu frequency, but because of lack of time it has not been done. I will remove it for now.

jnohlgard · 2015-02-03T09:16:34Z

@jfischer-phytec-iot
Could you rebase on latest master?

jnohlgard · 2015-02-04T12:52:54Z

cpu/kinetis_common/adc.c

I forgot to subtract 1 here.. Please change this to:

adc_config[dev].max_value = (1 << adc_config[dev].bits) - 1;

jnohlgard · 2015-02-04T12:54:35Z

I believe this is ready for merge after squashing and fixing the off by one error in adc.c (caused by me, oops!)

add peripheral drivers for Freescale Kinetis MCUs: adc driver cpuid driver gpio driver hwtimer_arch driver (hwtimer used Low Power Timer) i2c driver (master mode only) mcg driver pwm driver random_rnga driver random_rngb driver rtc driver spi driver timer driver (timer used Periodic Interrupt Timer) uart driver add doc.txt (configuration examples) random_rnga: Update RNGA driver in preparation for RNGB driver. random_rngb: Add RNGB driver. spi: refactor SPI to work for multiple CTARS, add spi_acquire, spi_release gpio: Add gpio_irq_enable, gpio_irq_disable. Refactor GPIO. gpio: Add gpio_irq_enable, gpio_irq_disable. gpio: Refactor ISR functions to work with all GPIOs (0-31) and all ports (PORTA-PORTH) adc: Refactor ADC, add calibration and scaling. Added integer scaling of results in adc_map. Handle precision setting in adc_init. Set ADC clock divider depending on module clock. Add ADC_1 as a possible device. Add ADC calibration procedure according to K60 ref manual. Handle ADC pins which are not part of the pin function mux. Signed-off-by: Joakim Gebart <[email protected]>

jnohlgard · 2015-02-05T08:59:52Z

ACK

Support for Freescale Kinetis MCUs, kinetis_common

OlegHahm · 2015-02-05T09:17:53Z

Great! Congrats and thanks for the effort.

jfischer-no added State: WIP State: The PR is still work-in-progress and its code is not in its final presentable form yet Platform: ARM Platform: This PR/issue effects ARM-based platforms labels Jan 8, 2015

jnohlgard mentioned this pull request Jan 8, 2015

cpu: RIOT port for Freescale Kinetis CPUs #2188

Closed

45 tasks

jnohlgard reviewed Jan 8, 2015
View reviewed changes

OlegHahm assigned jnohlgard Jan 8, 2015

miri64 mentioned this pull request Jan 9, 2015

Add support for Freescale K20 MCUs and the mchck board #2271

Closed

jnohlgard reviewed Jan 9, 2015
View reviewed changes

jnohlgard mentioned this pull request Jan 12, 2015

Add support for Kinetis K60 CPUs and Eistec Mulle IoT board #2282

Merged

jnohlgard added this to the Release NEXT MAJOR milestone Jan 13, 2015

jnohlgard mentioned this pull request Jan 13, 2015

drivers/periph/spi: added means to make SPI thread-safe #2290

Merged

jfischer-no added the Discussion: RFC The issue/PR is used as a discussion starting point about the item of the issue/PR label Jan 15, 2015

felinira reviewed Jan 15, 2015
View reviewed changes

jfischer-no mentioned this pull request Jan 20, 2015

RIOT port for the KW01Z128 SiP and Phytec PhyWave-KW01 Evaluations-Board #2328

Closed

jnohlgard reviewed Jan 21, 2015
View reviewed changes

jnohlgard reviewed Jan 30, 2015
View reviewed changes

cpu/kinetis_common/adc.c Outdated

Copy link
Copy Markdown

Member

jnohlgard Jan 30, 2015

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

For each case, add:

adc_config[dev].max_value = (1 << numbits) - 1;

jnohlgard reviewed Feb 1, 2015
View reviewed changes

jnohlgard added the CI: needs squashing Commits in this PR need to be squashed; If set, CI systems will mark this PR as unmergable label Feb 3, 2015

jnohlgard reviewed Feb 4, 2015
View reviewed changes

jnohlgard removed the State: WIP State: The PR is still work-in-progress and its code is not in its final presentable form yet label Feb 4, 2015

jfischer-no removed the CI: needs squashing Commits in this PR need to be squashed; If set, CI systems will mark this PR as unmergable label Feb 4, 2015

jnohlgard pushed a commit that referenced this pull request Feb 5, 2015

Merge pull request #2265 from jfischer-phytec-iot/pr@kinetis_common

890262e

Support for Freescale Kinetis MCUs, kinetis_common

jnohlgard merged commit 890262e into RIOT-OS:master Feb 5, 2015

jfischer-no deleted the pr@kinetis_common branch February 5, 2015 09:19

thomaseichinger mentioned this pull request Feb 5, 2015

RIOT port for the MKW22D512 SiP and Phytec PBA-D-01 PhyWave Evaluations-Board #2059

Merged

jfischer-no restored the pr@kinetis_common branch February 9, 2015 13:15

OlegHahm modified the milestones: Release NEXT MAJOR, Release 2015.06 Apr 29, 2015

jfischer-no deleted the pr@kinetis_common branch July 6, 2015 15:51

Conversation

jfischer-no commented Jan 8, 2015

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

jnohlgard commented Jan 9, 2015

Uh oh!

jfischer-no commented Jan 9, 2015

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

jnohlgard commented Jan 10, 2015

Uh oh!

jnohlgard commented Jan 11, 2015

Uh oh!

jnohlgard commented Jan 11, 2015

Uh oh!

jnohlgard commented Jan 12, 2015

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

jnohlgard commented Jan 20, 2015

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

jnohlgard commented Jan 30, 2015

Uh oh!

jfischer-no commented Jan 30, 2015

Uh oh!

jnohlgard commented Feb 1, 2015

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

jnohlgard commented Feb 3, 2015

Uh oh!

Choose a reason for hiding this comment

Uh oh!

jnohlgard commented Feb 4, 2015

Uh oh!

jnohlgard commented Feb 5, 2015

Uh oh!

OlegHahm commented Feb 5, 2015

Uh oh!

Reviewers

Assignees

Labels

Projects

Milestone

Development

Uh oh!

4 participants