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cpu/esp32: fix compilation for GCC 15.2 on ESP32x RISC-V SoCs#22017

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leandrolanzieri merged 1 commit intoRIOT-OS:masterfrom
gschorcht:cpu/esp32/fix_riscv_compilation_gcc_15_2
Jan 27, 2026
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cpu/esp32: fix compilation for GCC 15.2 on ESP32x RISC-V SoCs#22017
leandrolanzieri merged 1 commit intoRIOT-OS:masterfrom
gschorcht:cpu/esp32/fix_riscv_compilation_gcc_15_2

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@gschorcht
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@gschorcht gschorcht commented Jan 27, 2026

Contribution description

This PR fixes the compilation of the QCBOR package for RISC-V variants of ESP32x SoCs with GCC 15.2.

RISC-V variants of ESP32x do not have a floating point unit. The use of floating point hardware must be explicitly disabled in GCC 15.2 to avoid compilation errors.

The change also works with the current toolchain, which uses GCC 14.2. However, it is necessary in order to be able to switch the GCC version in riotdocker and Murdock first before the ESP-IDF can be ugraded which requires GCC 15.2.

Testing procedure

Compile and flash tests/pkg/qcbor for any ESP32x RISC-V board, for example:

BOARD=esp32c3-wemos-mini make -j8 -C tests/pkg/qcbor flash term

Without the PR, the compilation fails. With the PR, the compilation and the test work:

main(): This is RIOT! (Version: 2018.04-devel-32480-gd24fb-cpu/e..
OK (2 tests)
{ "threads": [{ "name": "idle", "stack_size": 2048, "stack_used": 256 }]}
{ "threads": [{ "name": "main", "stack_size": 3584, "stack_used": 852 }]}

Issues/PRs references

RISC-V variants of ESP32x do not have a floating point unit. The use of floating point hardware must therefore be disabled in GCC 15.2 to avoid compilation errors.
@github-actions github-actions bot added Platform: ESP Platform: This PR/issue effects ESP-based platforms Area: cpu Area: CPU/MCU ports labels Jan 27, 2026
@gschorcht gschorcht added Type: enhancement The issue suggests enhanceable parts / The PR enhances parts of the codebase / documentation CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR labels Jan 27, 2026
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@leandrolanzieri It is a very small fix and I would like to include this PR in version 2026.01 so that we can upgrade GCC in riotdocker and Murdock during the next release cycle. The latter will be necessary for future updates of the ESP-IDF SDK.

If it is OK for you, I would create a backport PR once this PR is merged.

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riot-ci commented Jan 27, 2026

Murdock results

✔️ PASSED

d24fb52 cpu/esp32: fix compilation for gcc 15.2 on ESP32x RISC-V SoCs

Success Failures Total Runtime
11004 0 11004 17m:50s

Artifacts

@gschorcht gschorcht requested a review from kaspar030 as a code owner January 27, 2026 07:25
@github-actions github-actions bot added the Area: CI Area: Continuous Integration of RIOT components label Jan 27, 2026
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@leandrolanzieri It is a very small fix and I would like to include this PR in version 2026.01 so that we can upgrade GCC in riotdocker and Murdock during the next release cycle. The latter will be necessary for future updates of the ESP-IDF SDK.

I think I don't fully understand, why is this needed in the release in order to bump the toolchain on the next release?

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I think I don't fully understand, why is this needed in the release in order to bump the toolchain on the next release?

When using BUILD_IN_DOCKER=1, the Docker image riot/riotbuild:latest is used. So if we bump the GCC version in riotdocker during the next development phase, which will be necessary for compiling future changes of the ESP32x port in CI, version 2026.01 will cause compilation problems for pkg/qcbor. For this reason, I thought that the PR should be released with the current release so that the later upgrade of the GCC in riotdocker will also work with this release.

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Ok, we can do it. Just this morning I created RC2, but I guess we can have an RC3 without affecting the schedule much.

@leandrolanzieri leandrolanzieri added this to the Release 2026.01 milestone Jan 27, 2026
@leandrolanzieri leandrolanzieri added the Process: needs backport Integration Process: The PR is required to be backported to a release or feature branch label Jan 27, 2026
@gschorcht gschorcht force-pushed the cpu/esp32/fix_riscv_compilation_gcc_15_2 branch from 4a56fbc to d24fb52 Compare January 27, 2026 14:59
@github-actions github-actions bot removed the Area: CI Area: Continuous Integration of RIOT components label Jan 27, 2026
@leandrolanzieri leandrolanzieri added this pull request to the merge queue Jan 27, 2026
Merged via the queue into RIOT-OS:master with commit 6343680 Jan 27, 2026
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@leandrolanzieri
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If it is OK for you, I would create a backport PR once this PR is merged.

@gschorcht you can create the backport

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@leandrolanzieri Thanks for reviewing and merging.

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Area: cpu Area: CPU/MCU ports CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR Platform: ESP Platform: This PR/issue effects ESP-based platforms Process: needs backport Integration Process: The PR is required to be backported to a release or feature branch Type: enhancement The issue suggests enhanceable parts / The PR enhances parts of the codebase / documentation

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3 participants