cpu/stm32: de-duplicate ifdefs#20609
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benpicco merged 2 commits intoRIOT-OS:masterfrom May 24, 2024
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Thank you for undertaking this cleanup!
Some comments:
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@MrKevinWeiss do you have some of the hardware in your test rack to give this a whirl? |
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Apr 25, 2024
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Good idea... I ripped everything apart but can set it back up tomorrow I think! |
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I can confirm that the blinky example is compiling and working on the following Nucleos: My NUCLEO-WB55 is at home, perhaps I can test it tomorrow. |
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The following boards look good! Details |
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Also ran the periph test shelid on a few and it worked... |
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Thank you for the cleanup @Enoch247 and thank you @MrKevinWeiss and @crasbe for testing!
Please squash.
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Please squash |
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Squashed. Please note I snuck in a fix to the includes, in commit 465e4fe. |
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sorry found an incorrect comment. fixed now. |
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You can directly squash such minor fixes (if you don't rebase onto master while doing so) |
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Squashed, and ready for merge now. |
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| return &APB1_PERIPH_LP_EN; | ||
| #endif | ||
| #ifdef APB12_PERIPH_LP_EN | ||
| #define HAS_LP_MODE 1 |
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seems like this can be defined in line 37 ?
would make this function more likely to fit on screen
maybe or not have an extra check here
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I consider doing it that way during development, but ultimately decided that it must be done as I did it to avoid potential for human error when porting to new processors. The goal was to minimize the amount of code one must touch or understand to extend support to a new MCU.
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| #endif | ||
| break; | ||
| #ifdef APB1_PERIPH_DIS | ||
| #define RCC_REG_IS_ATOMIC 1 |
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invert the logic for less repititon
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#define RCC_REG_IS_ATOMIC 1
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Can you elaborate? I don't understand.
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| defined(CPU_FAM_STM32F4) || \ | ||
| defined(CPU_FAM_STM32F7) || \ | ||
| defined(CPU_FAM_STM32L1) | ||
| #define APB1_PERIPH_LP_EN RCC->APB1LPENR |
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| #define APB1_PERIPH_LP_EN RCC->APB1LPENR | |
| #define HAS_LP_MODE 1 | |
| #define APB1_PERIPH_LP_EN RCC->APB1LPENR |
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This patch consolidates mutliple conditional compile blocks. This is done to simplify adding new STM32 CPU's and ease maintenance of existing ports.
Following best practice, this patch adds the module's header as its first include. Resulting compiler errors are also fixed by adding the header's missing include of cpu_conf.h.
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Contribution description
This patch consolidates mutliple conditional compile blocks. This is done to simplify adding new STM32 CPU's and ease maintenance of existing ports. This PR is also part of my on-going effort to port RIOT to the STM32H7 family.
Also, note that this PR makes functions that I re-wrote thread safe. I do not believe that the previous implementation was.
Testing procedure
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Issues/PRs references
This is an alternate approach to my first attempt (PR #20532) at cleaning up this part of the codebase.