cpu/stm32/periph/gpio: simplify condition code#20479
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cpu/stm32/periph/gpio_all.c
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| #elif defined(RCC_AHB4ENR_GPIOAEN) | ||
| periph_clk_en(AHB4, (RCC_MC_AHB4ENSETR_GPIOAEN << _port_num(pin))); |
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missmatch ??
| #elif defined(RCC_AHB4ENR_GPIOAEN) | |
| periph_clk_en(AHB4, (RCC_MC_AHB4ENSETR_GPIOAEN << _port_num(pin))); | |
| #elif defined(RCC_MC_AHB4ENSETR_GPIOAEN) | |
| periph_clk_en(AHB4, (RCC_MC_AHB4ENSETR_GPIOAEN << _port_num(pin))); |
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Good catch. Fixed. I am wondering why the build server didn't catch this?
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Interesting. Building locally (make -C examples/blinky BOARD=stm32mp157c-dk2), the mismatch is detected. Does CI/CD build for all boards for PRs?
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it does not build for all board, but more like one per kind (eg one stm32, one sam)
cpu/stm32/periph/gpio_all.c
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| #elif defined(RCC_AHB2ENR1_GPIOAEN) | ||
| periph_clk_en(AHB2, (RCC_AHB2ENR1_GPIOAEN << _port_num(pin))); | ||
| #elif defined(CPU_FAM_STM32MP1) | ||
| #elif defined(RCC_AHB4ENR_GPIOAEN) |
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| #elif defined(RCC_AHB4ENR_GPIOAEN) | |
| #elif defined(RCC_MC_AHB4ENSETR_GPIOAEN) |
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valid change, since the vendor macro contains the register name, makes this easier to read and adapt.
This is a good cleanup. Note though, that this is pretty similar to what we do in the STM32 GPIO LL implementation. Given that the plan is to drop all |
Thanks for the heads-up. I had some other improvements in gpio I wanted to make, but won't, given this info. However, my intent is to use this technique in several of the STM32 periph drivers as well as the STM32's periph bus code. So this small test has served its purpose to me. |
This patch similifies some of the handling of differences between STM32 chips. The intent is to improve scaling of the code as more chips are added.
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fixup commits squashed |
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I believe this is ready to merge. Is there something more I should be doing to gain the needed approval? |
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Contribution description
I am testing the water with this patch. If it is well received, there will be more coming. As I am adding support for the STM32H7 family of chips, I noticed I needed to add the chip family's name to several lists of chips to select the right code for the build. The aim here is to let the build system do the work for us to reduce the overhead of adding new chips.
Testing procedure
I tested by doing:
The above also works for my work-in-progress port to the Nucleo-STM32H723ZG. Other testers welcome.
Issues/PRs references
None known