boards: add stm32l496g-disco support#19576
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This still depends on #19572 according to the PR description. |
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19602: dist/tools/compile_commands: add another workaround r=chrysn a=maribu
### Contribution description
Filter out GCC only `--param=min-pagesize=0` in `clangd` mode. This fixes compilation of rust applications, that now fails with:
thread 'main' panicked at 'Unable to generate bindings: ClangDiagnostic("error: argument unused during compilation: '--param=min-pagesize=0' [-Wunused-command-line-argument]\n")', /home/maribu/.cargo/git/checkouts/rust-riot-sys-d12733b89271907c/b4bd4bd/build.rs:224:10
19618: cpu/stm32: fix riotboot settings for L4 and WB r=aabadie a=gschorcht
### Contribution description
This PR fixes the `riotboot` configuration for L4 and WB.
The family is not called `stm32l4` or `stm32wb` but `l4` and `wb`. That is, the `riotboot` configuration didn't work at all. Furthermore, a minimum `RIOTBOOT_LEN` of `0x2000` is required for L4.
Found when investigating the compilation errors for `bootloaders/riotboot_serial` in PR #19576.
### Testing procedure
1. Green CI.
2. Use the following commands:
```
BOARD=nucleo-l496zg make -C tests/riotboot info-debug-variable-RIOTBOOT_HDR_LEN
BOARD=p-nucleo-wb55 make -C tests/riotboot info-debug-variable-RIOTBOOT_HDR_LEN
```
In master these commands give
```
0x400
```
With this PR these commands give
```
0x200
```
as expected.
3. Use the following commands:
```
BOARD=nucleo-l496zg make -C tests/riotboot info-debug-variable-RIOTBOOT_LEN
BOARD=p-nucleo-wb55 make -C tests/riotboot info-debug-variable-RIOTBOOT_LEN
```
In master these commands give
```
0x1000
```
With this PR these commands give
```
0x2000
```
as expected.
### Issues/PRs references
19643: examples/suit_update: some test fixes r=aabadie a=kaspar030
Co-authored-by: Marian Buschsieweke <[email protected]>
Co-authored-by: Gunar Schorcht <[email protected]>
Co-authored-by: Kaspar Schleiser <[email protected]>
19618: cpu/stm32: fix riotboot settings for L4 and WB r=aabadie a=gschorcht ### Contribution description This PR fixes the `riotboot` configuration for L4 and WB. The family is not called `stm32l4` or `stm32wb` but `l4` and `wb`. That is, the `riotboot` configuration didn't work at all. Furthermore, a minimum `RIOTBOOT_LEN` of `0x2000` is required for L4. Found when investigating the compilation errors for `bootloaders/riotboot_serial` in PR #19576. ### Testing procedure 1. Green CI. 2. Use the following commands: ``` BOARD=nucleo-l496zg make -C tests/riotboot info-debug-variable-RIOTBOOT_HDR_LEN BOARD=p-nucleo-wb55 make -C tests/riotboot info-debug-variable-RIOTBOOT_HDR_LEN ``` In master these commands give ``` 0x400 ``` With this PR these commands give ``` 0x200 ``` as expected. 3. Use the following commands: ``` BOARD=nucleo-l496zg make -C tests/riotboot info-debug-variable-RIOTBOOT_LEN BOARD=p-nucleo-wb55 make -C tests/riotboot info-debug-variable-RIOTBOOT_LEN ``` In master these commands give ``` 0x1000 ``` With this PR these commands give ``` 0x2000 ``` as expected. ### Issues/PRs references 19643: examples/suit_update: some test fixes r=aabadie a=kaspar030 Co-authored-by: Gunar Schorcht <[email protected]> Co-authored-by: Kaspar Schleiser <[email protected]>
19618: cpu/stm32: fix riotboot settings for L4 and WB r=aabadie a=gschorcht ### Contribution description This PR fixes the `riotboot` configuration for L4 and WB. The family is not called `stm32l4` or `stm32wb` but `l4` and `wb`. That is, the `riotboot` configuration didn't work at all. Furthermore, a minimum `RIOTBOOT_LEN` of `0x2000` is required for L4. Found when investigating the compilation errors for `bootloaders/riotboot_serial` in PR #19576. ### Testing procedure 1. Green CI. 2. Use the following commands: ``` BOARD=nucleo-l496zg make -C tests/riotboot info-debug-variable-RIOTBOOT_HDR_LEN BOARD=p-nucleo-wb55 make -C tests/riotboot info-debug-variable-RIOTBOOT_HDR_LEN ``` In master these commands give ``` 0x400 ``` With this PR these commands give ``` 0x200 ``` as expected. 3. Use the following commands: ``` BOARD=nucleo-l496zg make -C tests/riotboot info-debug-variable-RIOTBOOT_LEN BOARD=p-nucleo-wb55 make -C tests/riotboot info-debug-variable-RIOTBOOT_LEN ``` In master these commands give ``` 0x1000 ``` With this PR these commands give ``` 0x2000 ``` as expected. ### Issues/PRs references 19636: sys: model ecc, evtimer, pipe and shell_lock in kconfig r=aabadie a=aabadie 19639: tests/net/gnrc_mac_timeout: add automated test r=aabadie a=aabadie Co-authored-by: Gunar Schorcht <[email protected]> Co-authored-by: Alexandre Abadie <[email protected]>
19618: cpu/stm32: fix riotboot settings for L4 and WB r=benpicco a=gschorcht ### Contribution description This PR fixes the `riotboot` configuration for L4 and WB. The family is not called `stm32l4` or `stm32wb` but `l4` and `wb`. That is, the `riotboot` configuration didn't work at all. Furthermore, a minimum `RIOTBOOT_LEN` of `0x2000` is required for L4. Found when investigating the compilation errors for `bootloaders/riotboot_serial` in PR #19576. ### Testing procedure 1. Green CI. 2. Use the following commands: ``` BOARD=nucleo-l496zg make -C tests/riotboot info-debug-variable-RIOTBOOT_HDR_LEN BOARD=p-nucleo-wb55 make -C tests/riotboot info-debug-variable-RIOTBOOT_HDR_LEN ``` In master these commands give ``` 0x400 ``` With this PR these commands give ``` 0x200 ``` as expected. 3. Use the following commands: ``` BOARD=nucleo-l496zg make -C tests/riotboot info-debug-variable-RIOTBOOT_LEN BOARD=p-nucleo-wb55 make -C tests/riotboot info-debug-variable-RIOTBOOT_LEN ``` In master these commands give ``` 0x1000 ``` With this PR these commands give ``` 0x2000 ``` as expected. ### Issues/PRs references 19639: tests/net/gnrc_mac_timeout: add automated test r=aabadie a=aabadie 19644: gnrc_ipv6_nib: include RIO with all subnets in downstream RA r=benpicco a=benpicco 19649: gnrc_sixlowpan_iphc: prefix bits outside context must be zero r=benpicco a=benpicco 19656: gnrc/ipv6_auto_subnets: allow to configure minimal prefix length r=benpicco a=benpicco Co-authored-by: Gunar Schorcht <[email protected]> Co-authored-by: Alexandre Abadie <[email protected]> Co-authored-by: Benjamin Valentin <[email protected]>
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bors merge |
18005: pkg/semtech-loramac: model in Kconfig r=aabadie a=aabadie 19576: boards: add stm32l496g-disco support r=aabadie a=gschorcht ### Contribution description The PR adds the board definition for the STM2L496G-DISO board. It is the same board that is also shipped with the P-L496G-CELL02 LTE pack for which we already have the board definition `p-l496g-cell02`. However, `stm32l496g-disco` provides a complete configuration of the board and supports the following features in addition to `p-l496g-cell02`: ``` > FEATURES_PROVIDED += periph_adc > FEATURES_PROVIDED += periph_dac > FEATURES_PROVIDED += periph_dma > FEATURES_PROVIDED += periph_pwm > FEATURES_PROVIDED += periph_uart_hw_fc > FEATURES_PROVIDED += arduino ``` In the long term, `p-l496g-cell02` is to be based on the new full `stm32l496g-disco` board definition. The CPT and the LCD display are not yet supported since they are connected to/controlled by the MFX (a STM32L152-based sub-system) and the FMC peripheral. ### Testing procedure All basic tests should work with the new board definition. The following tests were executed and did succeed: - [x] `tests/periph/adc` - [x] `tests/periph/dac` - [x] `tests/periph/i2c` for `I2C_DEV(0)`, `I2C_DEV(1)` is not exposed and not tested - [x] `tests/periph/pwm` - [x] `tests/periph/spi` for `SPI_DEV(0)`, `SPI_DEV(1) connection not soldered and not tested - [x] `tests/periph/timer` for `TIMER_DEV(0)` and `TIMER_DEV(1)` - [x] `tests/periph/uart` for `UART_DEV(0)`, `UART_DEV(1)` and `UART_DEV(2)` - [x] `tests/usbus_cdc_ecm` together with `stdio_cdc_acm` ### Issues/PRs references ~Depends on PR #19571~ ~Depends on PR #19572~ ~Depends on PR #19573~ 19650: drivers/nrf24l01p: model in kconfig r=aabadie a=aabadie 19660: cpu/rpx0xx: Fix kconfig model r=aabadie a=MrKevinWeiss ### Contribution description Broken master due to incorrect model of the periph_pio in kconfig. ### Testing procedure Green murdock (now that the board is added to the list) ### Issues/PRs references Look at the master CI... Co-authored-by: Alexandre Abadie <[email protected]> Co-authored-by: Gunar Schorcht <[email protected]> Co-authored-by: MrKevinWeiss <[email protected]>
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Build failed (retrying...): |
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There are remaining problems with kconfig spotted by Murdock. bors cancel for now |
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Canceled. |
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Let's reschedule that as it seems #18005 was in cause with the Murdock failure. bors merge |
19576: boards: add stm32l496g-disco support r=aabadie a=gschorcht ### Contribution description The PR adds the board definition for the STM2L496G-DISO board. It is the same board that is also shipped with the P-L496G-CELL02 LTE pack for which we already have the board definition `p-l496g-cell02`. However, `stm32l496g-disco` provides a complete configuration of the board and supports the following features in addition to `p-l496g-cell02`: ``` > FEATURES_PROVIDED += periph_adc > FEATURES_PROVIDED += periph_dac > FEATURES_PROVIDED += periph_dma > FEATURES_PROVIDED += periph_pwm > FEATURES_PROVIDED += periph_uart_hw_fc > FEATURES_PROVIDED += arduino ``` In the long term, `p-l496g-cell02` is to be based on the new full `stm32l496g-disco` board definition. The CPT and the LCD display are not yet supported since they are connected to/controlled by the MFX (a STM32L152-based sub-system) and the FMC peripheral. ### Testing procedure All basic tests should work with the new board definition. The following tests were executed and did succeed: - [x] `tests/periph/adc` - [x] `tests/periph/dac` - [x] `tests/periph/i2c` for `I2C_DEV(0)`, `I2C_DEV(1)` is not exposed and not tested - [x] `tests/periph/pwm` - [x] `tests/periph/spi` for `SPI_DEV(0)`, `SPI_DEV(1) connection not soldered and not tested - [x] `tests/periph/timer` for `TIMER_DEV(0)` and `TIMER_DEV(1)` - [x] `tests/periph/uart` for `UART_DEV(0)`, `UART_DEV(1)` and `UART_DEV(2)` - [x] `tests/usbus_cdc_ecm` together with `stdio_cdc_acm` ### Issues/PRs references ~Depends on PR #19571~ ~Depends on PR #19572~ ~Depends on PR #19573~ 19650: drivers/nrf24l01p: model in kconfig r=aabadie a=aabadie 19660: cpu/rpx0xx: Fix kconfig model r=aabadie a=MrKevinWeiss ### Contribution description Broken master due to incorrect model of the periph_pio in kconfig. ### Testing procedure Green murdock (now that the board is added to the list) ### Issues/PRs references Look at the master CI... Co-authored-by: Gunar Schorcht <[email protected]> Co-authored-by: Alexandre Abadie <[email protected]> Co-authored-by: MrKevinWeiss <[email protected]>
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Build failed (retrying...): |
19576: boards: add stm32l496g-disco support r=aabadie a=gschorcht ### Contribution description The PR adds the board definition for the STM2L496G-DISO board. It is the same board that is also shipped with the P-L496G-CELL02 LTE pack for which we already have the board definition `p-l496g-cell02`. However, `stm32l496g-disco` provides a complete configuration of the board and supports the following features in addition to `p-l496g-cell02`: ``` > FEATURES_PROVIDED += periph_adc > FEATURES_PROVIDED += periph_dac > FEATURES_PROVIDED += periph_dma > FEATURES_PROVIDED += periph_pwm > FEATURES_PROVIDED += periph_uart_hw_fc > FEATURES_PROVIDED += arduino ``` In the long term, `p-l496g-cell02` is to be based on the new full `stm32l496g-disco` board definition. The CPT and the LCD display are not yet supported since they are connected to/controlled by the MFX (a STM32L152-based sub-system) and the FMC peripheral. ### Testing procedure All basic tests should work with the new board definition. The following tests were executed and did succeed: - [x] `tests/periph/adc` - [x] `tests/periph/dac` - [x] `tests/periph/i2c` for `I2C_DEV(0)`, `I2C_DEV(1)` is not exposed and not tested - [x] `tests/periph/pwm` - [x] `tests/periph/spi` for `SPI_DEV(0)`, `SPI_DEV(1) connection not soldered and not tested - [x] `tests/periph/timer` for `TIMER_DEV(0)` and `TIMER_DEV(1)` - [x] `tests/periph/uart` for `UART_DEV(0)`, `UART_DEV(1)` and `UART_DEV(2)` - [x] `tests/usbus_cdc_ecm` together with `stdio_cdc_acm` ### Issues/PRs references ~Depends on PR #19571~ ~Depends on PR #19572~ ~Depends on PR #19573~ Co-authored-by: Gunar Schorcht <[email protected]>
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Build failed: |
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I had to fix a small problem with the backight pin (commit 1d8f075). |
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I enabled the "CI: no fast fail" so Murdock will report all problems at once. And there are still a few :) |
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please squash! |
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bors merge |
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Build succeeded! The publicly hosted instance of bors-ng is deprecated and will go away soon. If you want to self-host your own instance, instructions are here. If you want to switch to GitHub's built-in merge queue, visit their help page.
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Thanks for reviewing and merging. |
Contribution description
The PR adds the board definition for the STM2L496G-DISO board.
It is the same board that is also shipped with the P-L496G-CELL02 LTE pack for which we already have the board definition
p-l496g-cell02. However,stm32l496g-discoprovides a complete configuration of the board and supports the following features in addition top-l496g-cell02:In the long term,
p-l496g-cell02is to be based on the new fullstm32l496g-discoboard definition.The CPT and the LCD display are not yet supported since they are connected to/controlled by the MFX (a STM32L152-based sub-system) and the FMC peripheral.
Testing procedure
All basic tests should work with the new board definition. The following tests were executed and did succeed:
tests/periph/adctests/periph/dactests/periph/i2cforI2C_DEV(0),I2C_DEV(1)is not exposed and not testedtests/periph/pwmtests/periph/spiforSPI_DEV(0), `SPI_DEV(1) connection not soldered and not testedtests/periph/timerforTIMER_DEV(0)andTIMER_DEV(1)tests/periph/uartforUART_DEV(0),UART_DEV(1)andUART_DEV(2)tests/usbus_cdc_ecmtogether withstdio_cdc_acmIssues/PRs references
Depends on PR #19571Depends on PR #19572Depends on PR #19573