cpu/stm32/periph_dac: small improvements#19573
Merged
bors[bot] merged 3 commits intoRIOT-OS:masterfrom May 12, 2023
Merged
Conversation
For boards that have not connected the V_REF+ pin to an external reference voltage, the VREFBUF peripheral can be used as V_REF+ if supported by setting `VREFBUF_ENABLE=1`.
If the DAC peripheral has a mode register (DAC_MCR), it is set to normal mode with buffer enabled and connected to external pin and on-chip peripherals. This allows to measure the current value of a DAC channel or to use the DAC channel also for other on-chip peripherals.
8 tasks
benpicco
approved these changes
May 11, 2023
Member
|
bors merge |
bors bot
added a commit
that referenced
this pull request
May 12, 2023
19573: cpu/stm32/periph_dac: small improvements r=maribu a=gschorcht ### Contribution description This PR provides the following improvements for `periph_dac` on STM32 - Support for `RCC_APB1ENR1_DAC1EN` symbol added. - For boards that have not connected the V_REF+ pin to an external reference voltage, the VREFBUF peripheral can be used as V_REF+ (if supported) by setting `VREFBUF_ENABLE=1`. - If the DAC peripheral has a mode register (`DAC_MCR`), it is set to normal mode with buffer enabled and connected to external pin and on-chip peripherals. This allows to measure the current value of a DAC channel with an ADC channel or to use the DAC channel also for other on-chip peripherals. ### Testing procedure - Green CI - `tests/periph_dac` should still work for any board supporting the `periph_dac` feature. ### Issues/PRs references 19584: tests/build_system/external_board_dirs: fix broken symlinks r=maribu a=aabadie Co-authored-by: Gunar Schorcht <[email protected]> Co-authored-by: Alexandre Abadie <[email protected]>
Member
|
bors cancel (Let's try to pack the merge train) |
Contributor
|
Canceled. |
Contributor
|
Build succeeded! The publicly hosted instance of bors-ng is deprecated and will go away soon. If you want to self-host your own instance, instructions are here. If you want to switch to GitHub's built-in merge queue, visit their help page. |
bors bot
added a commit
that referenced
this pull request
May 24, 2023
18005: pkg/semtech-loramac: model in Kconfig r=aabadie a=aabadie 19576: boards: add stm32l496g-disco support r=aabadie a=gschorcht ### Contribution description The PR adds the board definition for the STM2L496G-DISO board. It is the same board that is also shipped with the P-L496G-CELL02 LTE pack for which we already have the board definition `p-l496g-cell02`. However, `stm32l496g-disco` provides a complete configuration of the board and supports the following features in addition to `p-l496g-cell02`: ``` > FEATURES_PROVIDED += periph_adc > FEATURES_PROVIDED += periph_dac > FEATURES_PROVIDED += periph_dma > FEATURES_PROVIDED += periph_pwm > FEATURES_PROVIDED += periph_uart_hw_fc > FEATURES_PROVIDED += arduino ``` In the long term, `p-l496g-cell02` is to be based on the new full `stm32l496g-disco` board definition. The CPT and the LCD display are not yet supported since they are connected to/controlled by the MFX (a STM32L152-based sub-system) and the FMC peripheral. ### Testing procedure All basic tests should work with the new board definition. The following tests were executed and did succeed: - [x] `tests/periph/adc` - [x] `tests/periph/dac` - [x] `tests/periph/i2c` for `I2C_DEV(0)`, `I2C_DEV(1)` is not exposed and not tested - [x] `tests/periph/pwm` - [x] `tests/periph/spi` for `SPI_DEV(0)`, `SPI_DEV(1) connection not soldered and not tested - [x] `tests/periph/timer` for `TIMER_DEV(0)` and `TIMER_DEV(1)` - [x] `tests/periph/uart` for `UART_DEV(0)`, `UART_DEV(1)` and `UART_DEV(2)` - [x] `tests/usbus_cdc_ecm` together with `stdio_cdc_acm` ### Issues/PRs references ~Depends on PR #19571~ ~Depends on PR #19572~ ~Depends on PR #19573~ 19650: drivers/nrf24l01p: model in kconfig r=aabadie a=aabadie 19660: cpu/rpx0xx: Fix kconfig model r=aabadie a=MrKevinWeiss ### Contribution description Broken master due to incorrect model of the periph_pio in kconfig. ### Testing procedure Green murdock (now that the board is added to the list) ### Issues/PRs references Look at the master CI... Co-authored-by: Alexandre Abadie <[email protected]> Co-authored-by: Gunar Schorcht <[email protected]> Co-authored-by: MrKevinWeiss <[email protected]>
bors bot
added a commit
that referenced
this pull request
May 24, 2023
19576: boards: add stm32l496g-disco support r=aabadie a=gschorcht ### Contribution description The PR adds the board definition for the STM2L496G-DISO board. It is the same board that is also shipped with the P-L496G-CELL02 LTE pack for which we already have the board definition `p-l496g-cell02`. However, `stm32l496g-disco` provides a complete configuration of the board and supports the following features in addition to `p-l496g-cell02`: ``` > FEATURES_PROVIDED += periph_adc > FEATURES_PROVIDED += periph_dac > FEATURES_PROVIDED += periph_dma > FEATURES_PROVIDED += periph_pwm > FEATURES_PROVIDED += periph_uart_hw_fc > FEATURES_PROVIDED += arduino ``` In the long term, `p-l496g-cell02` is to be based on the new full `stm32l496g-disco` board definition. The CPT and the LCD display are not yet supported since they are connected to/controlled by the MFX (a STM32L152-based sub-system) and the FMC peripheral. ### Testing procedure All basic tests should work with the new board definition. The following tests were executed and did succeed: - [x] `tests/periph/adc` - [x] `tests/periph/dac` - [x] `tests/periph/i2c` for `I2C_DEV(0)`, `I2C_DEV(1)` is not exposed and not tested - [x] `tests/periph/pwm` - [x] `tests/periph/spi` for `SPI_DEV(0)`, `SPI_DEV(1) connection not soldered and not tested - [x] `tests/periph/timer` for `TIMER_DEV(0)` and `TIMER_DEV(1)` - [x] `tests/periph/uart` for `UART_DEV(0)`, `UART_DEV(1)` and `UART_DEV(2)` - [x] `tests/usbus_cdc_ecm` together with `stdio_cdc_acm` ### Issues/PRs references ~Depends on PR #19571~ ~Depends on PR #19572~ ~Depends on PR #19573~ 19650: drivers/nrf24l01p: model in kconfig r=aabadie a=aabadie 19660: cpu/rpx0xx: Fix kconfig model r=aabadie a=MrKevinWeiss ### Contribution description Broken master due to incorrect model of the periph_pio in kconfig. ### Testing procedure Green murdock (now that the board is added to the list) ### Issues/PRs references Look at the master CI... Co-authored-by: Gunar Schorcht <[email protected]> Co-authored-by: Alexandre Abadie <[email protected]> Co-authored-by: MrKevinWeiss <[email protected]>
bors bot
added a commit
that referenced
this pull request
May 24, 2023
19576: boards: add stm32l496g-disco support r=aabadie a=gschorcht ### Contribution description The PR adds the board definition for the STM2L496G-DISO board. It is the same board that is also shipped with the P-L496G-CELL02 LTE pack for which we already have the board definition `p-l496g-cell02`. However, `stm32l496g-disco` provides a complete configuration of the board and supports the following features in addition to `p-l496g-cell02`: ``` > FEATURES_PROVIDED += periph_adc > FEATURES_PROVIDED += periph_dac > FEATURES_PROVIDED += periph_dma > FEATURES_PROVIDED += periph_pwm > FEATURES_PROVIDED += periph_uart_hw_fc > FEATURES_PROVIDED += arduino ``` In the long term, `p-l496g-cell02` is to be based on the new full `stm32l496g-disco` board definition. The CPT and the LCD display are not yet supported since they are connected to/controlled by the MFX (a STM32L152-based sub-system) and the FMC peripheral. ### Testing procedure All basic tests should work with the new board definition. The following tests were executed and did succeed: - [x] `tests/periph/adc` - [x] `tests/periph/dac` - [x] `tests/periph/i2c` for `I2C_DEV(0)`, `I2C_DEV(1)` is not exposed and not tested - [x] `tests/periph/pwm` - [x] `tests/periph/spi` for `SPI_DEV(0)`, `SPI_DEV(1) connection not soldered and not tested - [x] `tests/periph/timer` for `TIMER_DEV(0)` and `TIMER_DEV(1)` - [x] `tests/periph/uart` for `UART_DEV(0)`, `UART_DEV(1)` and `UART_DEV(2)` - [x] `tests/usbus_cdc_ecm` together with `stdio_cdc_acm` ### Issues/PRs references ~Depends on PR #19571~ ~Depends on PR #19572~ ~Depends on PR #19573~ Co-authored-by: Gunar Schorcht <[email protected]>
bors bot
added a commit
that referenced
this pull request
May 27, 2023
19576: boards: add stm32l496g-disco support r=aabadie a=gschorcht ### Contribution description The PR adds the board definition for the STM2L496G-DISO board. It is the same board that is also shipped with the P-L496G-CELL02 LTE pack for which we already have the board definition `p-l496g-cell02`. However, `stm32l496g-disco` provides a complete configuration of the board and supports the following features in addition to `p-l496g-cell02`: ``` > FEATURES_PROVIDED += periph_adc > FEATURES_PROVIDED += periph_dac > FEATURES_PROVIDED += periph_dma > FEATURES_PROVIDED += periph_pwm > FEATURES_PROVIDED += periph_uart_hw_fc > FEATURES_PROVIDED += arduino ``` In the long term, `p-l496g-cell02` is to be based on the new full `stm32l496g-disco` board definition. The CPT and the LCD display are not yet supported since they are connected to/controlled by the MFX (a STM32L152-based sub-system) and the FMC peripheral. ### Testing procedure All basic tests should work with the new board definition. The following tests were executed and did succeed: - [x] `tests/periph/adc` - [x] `tests/periph/dac` - [x] `tests/periph/i2c` for `I2C_DEV(0)`, `I2C_DEV(1)` is not exposed and not tested - [x] `tests/periph/pwm` - [x] `tests/periph/spi` for `SPI_DEV(0)`, `SPI_DEV(1) connection not soldered and not tested - [x] `tests/periph/timer` for `TIMER_DEV(0)` and `TIMER_DEV(1)` - [x] `tests/periph/uart` for `UART_DEV(0)`, `UART_DEV(1)` and `UART_DEV(2)` - [x] `tests/usbus_cdc_ecm` together with `stdio_cdc_acm` ### Issues/PRs references ~Depends on PR #19571~ ~Depends on PR #19572~ ~Depends on PR #19573~ Co-authored-by: Gunar Schorcht <[email protected]>
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Contribution description
This PR provides the following improvements for
periph_dacon STM32RCC_APB1ENR1_DAC1ENsymbol added.VREFBUF_ENABLE=1.DAC_MCR), it is set to normal mode with buffer enabled and connected to external pin and on-chip peripherals. This allows to measure the current value of a DAC channel with an ADC channel or to use the DAC channel also for other on-chip peripherals.Testing procedure
tests/periph_dacshould still work for any board supporting theperiph_dacfeature.Issues/PRs references