cpu/sam0_common: adc: add support for differential mode#18146
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benpicco merged 8 commits intoRIOT-OS:masterfrom Sep 27, 2022
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cpu/sam0_common: adc: add support for differential mode#18146benpicco merged 8 commits intoRIOT-OS:masterfrom
benpicco merged 8 commits intoRIOT-OS:masterfrom
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- store result in int16_t to ensure proper sign extension - double differential result to account for bit lost for sign
rg define\ PIN_.*_AIN | grep ADC | cut -d' ' -f2 | sort | uniq | sed -E "s/PIN_(P[A-F])([0-9][0-9])B_ADC0_AIN([0-9]*)/\3 GPIO_PIN(\1, \2),/" | sort -n | grep GPIO | cut -d ' ' -f2- | sed -E "s/0([0-9])/\1/" rg define\ PIN_.*_AIN | grep ADC | cut -d' ' -f2 | sort | uniq | sed -E "s/PIN_(P[A-F])([0-9][0-9])B_ADC1_AIN([0-9]*)/\3 GPIO_PIN(\1, \2),/" | sort -n | grep GPIO | cut -d ' ' -f2- | sed -E "s/0([0-9])/\1/"
ADC pins are fixed on sam0
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Maybe I should push a bit more for ADC NG? |
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MrKevinWeiss
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It would be nice to also add some table of defines so we don't lose the coupling of the labels on the boards to the pins.
Since we know what that is based on the CPU stuff it would just be some alias:
#define ADC_INPUTCTRL_MUXPOS_PA2 ADC_INPUTCTRL_MUXPOS_PIN8
#define ADC_INPUTCTRL_MUXPOS_PA3 ADC_INPUTCTRL_MUXPOS_PIN8
/* ... */
#define ADC_INPUTCTRL_MUXNEG_PA2 ADC_INPUTCTRL_MUXNEG_PIN8... Maybe an oversimplification as you probably need some extra info for both ADCs.
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Something so I can look at the periph_conf and know how to connect the board. |
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I wrote This script#include <stdbool.h>
#include <stdio.h>
#define GPIO_PIN(a, b) { #a, b }
#define ARRAY_SIZE(a) (sizeof((a)) / sizeof((a)[0]))
typedef struct {
const char *port;
unsigned pin;
} gpio_t;
#define MUXNEG_MAX 7
#define IS_SAMD2X 0
/**
* @brief Pins that can be used for ADC input
*/
static const gpio_t sam0_adc_pins[2][16] = {
{ /* ADC0 pins */
GPIO_PIN(PA, 2), GPIO_PIN(PA, 3), GPIO_PIN(PB, 8), GPIO_PIN(PB, 9),
GPIO_PIN(PA, 4), GPIO_PIN(PA, 5), GPIO_PIN(PA, 6), GPIO_PIN(PA, 7),
GPIO_PIN(PA, 8), GPIO_PIN(PA, 9), GPIO_PIN(PA, 10), GPIO_PIN(PA, 11),
GPIO_PIN(PB, 0), GPIO_PIN(PB, 1), GPIO_PIN(PB, 2), GPIO_PIN(PB, 3)
},
{ /* ADC1 pins */
GPIO_PIN(PB, 8), GPIO_PIN(PB, 9), GPIO_PIN(PA, 8), GPIO_PIN(PA, 9),
GPIO_PIN(PC, 2), GPIO_PIN(PC, 3), GPIO_PIN(PB, 4), GPIO_PIN(PB, 5),
GPIO_PIN(PB, 6), GPIO_PIN(PB, 7), GPIO_PIN(PC, 0), GPIO_PIN(PC, 1),
GPIO_PIN(PC, 30), GPIO_PIN(PC, 31), GPIO_PIN(PD, 0), GPIO_PIN(PD, 1)
}
};
static const char* _num(unsigned i)
{
static char buf[4];
snprintf(buf, sizeof(buf), "%u", i);
return buf;
}
static void print_alias(bool neg)
{
for (unsigned j = 0; j < ARRAY_SIZE(sam0_adc_pins); ++j) {
if (j) {
puts("");
}
for (unsigned i = 0; i < ARRAY_SIZE(sam0_adc_pins[j]); ++i) {
if (neg && i > MUXNEG_MAX) {
break;
}
printf("#define ADC%s_INPUTCTRL_MUX%s_%s%02u ADC_INPUTCTRL_MUXPOS_%cIN%u /**< Alias for %cIN%u */\n",
ARRAY_SIZE(sam0_adc_pins) > 1 ? _num(j) : "",
neg ? "NEG" : "POS",
sam0_adc_pins[j][i].port, sam0_adc_pins[j][i].pin,
IS_SAMD2X ? 'P' : 'A', i,
IS_SAMD2X ? 'P' : 'A', i
);
}
}
}
int main(void)
{
printf("/**\n * @brief ADC pin aliases\n * @{\n */\n");
print_alias(false);
puts("");
print_alias(true);
printf("/** @} */\n");
return 0;
}to generate the alias defines. |
MrKevinWeiss
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Sep 27, 2022
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Looks good, I tested (though only with grounds and 3.3) before the aliases were added. I trust the aliasing was done correctly so you have my ACK good sir.
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Thank you! |
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Contribution description
In differential mode the ADC measures the difference between two input voltages by setting the muxneg bits to the ADC pin number instead of GND. This voltage differential can also be negative, which results in us reading a singed 16 bit value from the ADC result register.
The muxneg component is written together with the muxpos, the
.muxposfield of the ADC config already gets written straight to the INPUTCTRL register, so we can just add muxneg there as well.To avoid having to introduce a second gpio pin member to
adc_conf_chan_t(and keeping that in sync with the.muxposmember, I instead added an array of all ADC Pins to the sam0 CPUs.Those are fixed and have a 1:1 mapping to GPIOs. This allows us to just set
.muxposand derive the GPIO pin from that. The.pinmember is now unused and will be removed by a follow-up (API breaking) PR. Then we can also rename the.muxposmember to the more fitting.inputctrl.Testing procedure
To test differential mode I used a 3.3V CAN transceiver to create a differential voltage.
In dominant mode we should be able to measure the voltage differential between CANH and CANL.
In recessive mode the voltage differential should be 0V.
A second ADC line was configured to also measure the voltage differential against GND.
same54-xpro
ADC config
samd20-xpro
ADC config
Issues/PRs references