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cpu/fe310: Add call to periph_init()#10825

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kaspar030 merged 1 commit intoRIOT-OS:masterfrom
maribu:fe310_periph_init
Feb 5, 2019
Merged

cpu/fe310: Add call to periph_init()#10825
kaspar030 merged 1 commit intoRIOT-OS:masterfrom
maribu:fe310_periph_init

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@maribu maribu commented Jan 19, 2019

Contribution description

Until now fe310's cpu_init() was missing a call to periph_init(). This commit adds this call.

Testing procedure

Check if the HiFive1 board still boots as expected

Issues/PRs references

Required for #10806

@maribu maribu added Platform: RISC-V Platform: This PR/issue effects RISC-V-based platforms Area: cpu Area: CPU/MCU ports labels Jan 19, 2019
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maribu commented Jan 19, 2019

@kenrabold: Would you mind to test his PR? If #10806 is rebased against this PR, #10806 should then also work (hopefully).

@maribu maribu added CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR and removed CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR labels Jan 19, 2019
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maribu commented Jan 19, 2019

I hope noone started to review now, so I'll just squash

@maribu maribu force-pushed the fe310_periph_init branch from dd890a6 to b8b7591 Compare January 19, 2019 11:59
Until now fe310's cpu_init() was missing a call to periph_init().
This commit adds this call.
@maribu maribu force-pushed the fe310_periph_init branch from b8b7591 to 08fba76 Compare January 19, 2019 12:00
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maribu commented Jan 19, 2019

OK, now every issue uncovered by Murdock is solved. Sadly, I'm completely unable to tell if this PR actually works without having the hardware...

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Yes, this works on the HiFive1 board in conjunction with PR #10806

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maribu commented Jan 20, 2019

@kenrabold: Thanks for testing. Maybe @miri64 could also give this a quick look.

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miri64 commented Jan 20, 2019

I'm not really involved with the internals of the periph API. So rather someone else should have a look.

@miri64 miri64 added the Type: enhancement The issue suggests enhanceable parts / The PR enhances parts of the codebase / documentation label Jan 20, 2019
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maribu commented Jan 20, 2019

If I read the git logs correctly, @haukepetersen has worked on both periph and the fe310 CPU. Maybe @haukepetersen could have a look?

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maribu commented Jan 27, 2019

@haukepetersen: Mind to review? Only 5 lines changed ;-)

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maribu commented Feb 5, 2019

@jcarrano and @smlng seem to also have worked on cpu/fe310. Maybe one of you could review? @kenrabold thankfully already tested this PR.

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LGTM!

@kaspar030 kaspar030 merged commit 5a35e6e into RIOT-OS:master Feb 5, 2019
@maribu maribu deleted the fe310_periph_init branch March 8, 2019 16:42
@danpetry danpetry added this to the Release 2019.04 milestone Mar 26, 2019
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Area: cpu Area: CPU/MCU ports CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR Platform: RISC-V Platform: This PR/issue effects RISC-V-based platforms Type: enhancement The issue suggests enhanceable parts / The PR enhances parts of the codebase / documentation

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5 participants