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boards/nucleo: Pin usage collision (SPI clk vs. LED0) #6501
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Type: bugThe issue reports a bug / The PR fixes a bug (including spelling errors)The issue reports a bug / The PR fixes a bug (including spelling errors)
Description
On most (all) STM nucleo boards we have a pin usage collision on pin PA05. It is used for both LED0 and SPI_DEV(0) sclk. Now after the SPI remodeling was merged, the SPI busses are for some boards now initialized before the LED pin, leading to an overridden pin config and a not working SPI clock line...
Now the question is how to proceed here.
@kaspar030: would you mind to check the pin configuration (MODER register) for your F334/encx24 setup quickly? Thx
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Type: bugThe issue reports a bug / The PR fixes a bug (including spelling errors)The issue reports a bug / The PR fixes a bug (including spelling errors)