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treewide: fix double the in doc and comments
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boards/common/esp8266/include/board_modules.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,7 @@ extern "C" {
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*
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* Configuration for the ENC28J60 interface when module ```enc28j60``` is used.
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*
44-
* SPI_DEV(0) is always used for the the module. The only configurations that
44+
* SPI_DEV(0) is always used for the module. The only configurations that
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* can be overridden by \ref esp8266_application_specific_board_configuration
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* "Application Specific Board Configuration" are the CS, INT and RESET signals.
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*
@@ -70,7 +70,7 @@ extern "C" {
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*
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* Configuration for the MRF24J40 interface when module ```mrf24j40``` is used.
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*
73-
* SPI_DEV(0) is always used for the the module. The only configurations that
73+
* SPI_DEV(0) is always used for the module. The only configurations that
7474
* can be overridden by \ref esp8266_application_specific_board_configuration
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* "Application Specific Board Configuration" are the CS, INT and RESET signals.
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*

boards/ikea-tradfri/doc.txt

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Original file line numberDiff line numberDiff line change
@@ -90,7 +90,7 @@ Pin 1 is on the top-left side with only 6 contacts.
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| | SPI | partially | Only master mode |
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| | Timer | yes | |
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| | UART | yes | USART is shared with SPI. LEUART baud rate limited (see below) |
93-
| SPI NOR Flash | IS25LQ020B | yes | 2MBit flash. Can be used with the the MTD API. |
93+
| SPI NOR Flash | IS25LQ020B | yes | 2MBit flash. Can be used with the MTD API. |
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## Board configuration
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boards/spark-core/doc.txt

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Original file line numberDiff line numberDiff line change
@@ -66,7 +66,7 @@ now replug the usb cable and flash.
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To flash RIOT to the spark core you need to install `dfu-util` (tested with
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0.7 and 0.8).
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69-
Power the device and press the the `mode` button until the LED flashes
69+
Power the device and press the `mode` button until the LED flashes
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yellow/orange: now the device is ready to get flashed.
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# Firmware upgrade

boards/stm32l496g-disco/include/periph_conf.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -86,7 +86,7 @@ static const dma_conf_t dma_config[] = {
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* channel 0.
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*
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* The V_REF+ pin is not connected to an external reference voltage on the
89-
* board by default. Instead the the VREFBUF must be used (`VREFBUF_ENABLE=1`).
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* board by default. Instead the VREFBUF must be used (`VREFBUF_ENABLE=1`).
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* The output voltage of VREF is around 2.048 V in this case.
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*
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* If an external reference voltage is used as V_REF+, either by soldering
@@ -146,7 +146,7 @@ static const adc_conf_t adc_config[] = {
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* @name DAC configuration
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*
148148
* The V_REF+ pin is not connected to an external reference voltage on the
149-
* board by default. Instead the the VREFBUF must be used (`VREFBUF_ENABLE=1`).
149+
* board by default. Instead the VREFBUF must be used (`VREFBUF_ENABLE=1`).
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* The output voltage of VREF is around 2.048 V in this case.
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*
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* @{

cpu/cortexm_common/include/cpu_conf_common.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@ extern "C" {
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* usage, we define the default stack size values here centrally for all CPU
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* implementations.
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*
33-
* If needed, you can overwrite these values the the `cpu_conf.h` file of the
33+
* If needed, you can overwrite these values the `cpu_conf.h` file of the
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* specific CPU implementation.
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*
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* @todo Adjust values for Cortex-M4F with FPU?

cpu/esp32/doc.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -727,7 +727,7 @@ ESP-IDF SDK provides a complex heap implementation that supports multiple heap
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segments in different memory areas such as DRAM, IRAM, and PSRAM. Whenever you
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want to use these memory areas as heap, you have to use the heap implementation
729729
from the ESP-IDF SDK. ESP-IDF heap is not used by default. To use it, it has to
730-
be enabled by the the makefile of the application:
730+
be enabled by the makefile of the application:
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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USEMODULE += esp_heap
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

cpu/esp32/esp-eth/esp_eth_netdev.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -256,7 +256,7 @@ static int _esp_eth_send(netdev_t *netdev, const iolist_t *iolist)
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257257
int ret = 0;
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259-
/* send the the packet to the peer(s) mac address */
259+
/* send the packet to the peer(s) mac address */
260260
if (esp_eth_transmit(dev->eth_driver, dev->tx_buf, dev->tx_len) == ESP_OK) {
261261
netdev->event_callback(netdev, NETDEV_EVENT_TX_COMPLETE);
262262
}

cpu/esp_common/esp-wifi/esp_wifi_netdev.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -663,7 +663,7 @@ static int _esp_wifi_send(netdev_t *netdev, const iolist_t *iolist)
663663
#ifdef MODULE_ESP_WIFI_AP
664664
if (esp_wifi_internal_tx(WIFI_IF_AP, dev->tx_buf, dev->tx_len) == ESP_OK) {
665665
#else /* MODULE_ESP_WIFI_AP */
666-
/* send the the packet to the peer(s) mac address */
666+
/* send the packet to the peer(s) mac address */
667667
if (esp_wifi_internal_tx(WIFI_IF_STA, dev->tx_buf, dev->tx_len) == ESP_OK) {
668668
#endif
669669
#ifndef CPU_ESP8266

cpu/kinetis/include/bme.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -56,7 +56,7 @@ extern "C"
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*
5757
* @param[in] ptr Pointer to target register
5858
* @param[in] bit Location of the LSB of the bitfield within the register
59-
* @param[in] width Width of the the bitfield, in bits
59+
* @param[in] width Width of the bitfield, in bits
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*
6161
* @return bitfield address as an uintptr_t
6262
*/
@@ -76,7 +76,7 @@ static inline volatile void *bme_bf_addr(volatile void *ptr, uintptr_t bit, uint
7676
*
7777
* @param[in] ptr Pointer to target register
7878
* @param[in] bit Location of the LSB of the bitfield within the register
79-
* @param[in] width Width of the the bitfield, in bits
79+
* @param[in] width Width of the bitfield, in bits
8080
*
8181
* @return bitfield extracted as a (modifiable) lvalue
8282
*/
@@ -96,7 +96,7 @@ static inline volatile uint32_t *bme_bitfield32(volatile uint32_t *ptr, uint8_t
9696
*
9797
* @param[in] ptr Pointer to target register
9898
* @param[in] bit Location of the LSB of the bitfield within the register
99-
* @param[in] width Width of the the bitfield, in bits
99+
* @param[in] width Width of the bitfield, in bits
100100
*
101101
* @return bitfield extracted as a (modifiable) lvalue
102102
*/
@@ -116,7 +116,7 @@ static inline volatile uint16_t *bme_bitfield16(volatile uint16_t *ptr, uint8_t
116116
*
117117
* @param[in] ptr Pointer to target register
118118
* @param[in] bit Location of the LSB of the bitfield within the register
119-
* @param[in] width Width of the the bitfield, in bits
119+
* @param[in] width Width of the bitfield, in bits
120120
*
121121
* @return bitfield extracted as a (modifiable) lvalue
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*/

cpu/kinetis/include/cpu_conf_kinetis_k.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -123,7 +123,7 @@
123123
/**
124124
* @name Hardware random number generator module configuration
125125
*
126-
* For K64F SCG3 or SCG6 can be used depending on if the the
126+
* For K64F SCG3 or SCG6 can be used depending on if the
127127
* peripheral is accessed through AIPS-lite0 or AIPS-lite1.
128128
* For K64F RNGA is only mapped to SCG6.
129129
* @{

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