Skip to content

Commit 8555a66

Browse files
Enoch247Enoch247
committed
cpu/stm32/periph/gpio: simplify conditional code
This patch similifies some of the handling of differences between STM32 chips. The intent is to improve scaling of the code as more chips are added.
1 parent 3aaea1a commit 8555a66

File tree

1 file changed

+24
-24
lines changed

1 file changed

+24
-24
lines changed

‎cpu/stm32/periph/gpio_all.c‎

Lines changed: 24 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@
2222
* @author Alexandre Abadie <[email protected]>
2323
* @author Katja Kirstein <[email protected]>
2424
* @author Vincent Dupont <[email protected]>
25+
* @author Joshua DeWeese <[email protected]>
2526
*
2627
* @}
2728
*/
@@ -98,31 +99,30 @@ static inline int _pin_num(gpio_t pin)
9899
static inline void port_init_clock(GPIO_TypeDef *port, gpio_t pin)
99100
{
100101
(void)port; /* <-- Only used for when port G requires special handling */
101-
#if defined(CPU_FAM_STM32F0) || defined (CPU_FAM_STM32F3) || defined(CPU_FAM_STM32L1)
102+
103+
#if defined(RCC_AHBENR_GPIOAEN)
102104
periph_clk_en(AHB, (RCC_AHBENR_GPIOAEN << _port_num(pin)));
103-
#elif defined (CPU_FAM_STM32L0) || defined(CPU_FAM_STM32G0) || \
104-
defined(CPU_FAM_STM32C0)
105-
periph_clk_en(IOP, (RCC_IOPENR_GPIOAEN << _port_num(pin)));
106-
#elif defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32WB) || \
107-
defined(CPU_FAM_STM32G4) || defined(CPU_FAM_STM32L5) || \
108-
defined(CPU_FAM_STM32U5) || defined (CPU_FAM_STM32WL)
109-
#if defined(CPU_FAM_STM32U5)
105+
#elif defined(RCC_AHB1ENR_GPIOAEN)
106+
periph_clk_en(AHB1, (RCC_AHB1ENR_GPIOAEN << _port_num(pin)));
107+
#elif defined(RCC_AHB2ENR_GPIOAEN)
108+
periph_clk_en(AHB2, (RCC_AHB2ENR_GPIOAEN << _port_num(pin)));
109+
#elif defined(RCC_AHB2ENR1_GPIOAEN)
110110
periph_clk_en(AHB2, (RCC_AHB2ENR1_GPIOAEN << _port_num(pin)));
111+
#elif defined(RCC_MC_AHB4ENSETR_GPIOAEN)
112+
periph_clk_en(AHB4, (RCC_MC_AHB4ENSETR_GPIOAEN << _port_num(pin)));
113+
#elif defined (RCC_IOPENR_GPIOAEN)
114+
periph_clk_en(IOP, (RCC_IOPENR_GPIOAEN << _port_num(pin)));
111115
#else
112-
periph_clk_en(AHB2, (RCC_AHB2ENR_GPIOAEN << _port_num(pin)));
116+
#error "GPIO periph clock undefined"
113117
#endif
118+
114119
#ifdef PWR_CR2_IOSV
115120
if (port == GPIOG) {
116121
/* Port G requires external power supply */
117122
periph_clk_en(APB1, RCC_APB1ENR1_PWREN);
118123
PWR->CR2 |= PWR_CR2_IOSV;
119124
}
120125
#endif /* PWR_CR2_IOSV */
121-
#elif defined(CPU_FAM_STM32MP1)
122-
periph_clk_en(AHB4, (RCC_MC_AHB4ENSETR_GPIOAEN << _port_num(pin)));
123-
#else
124-
periph_clk_en(AHB1, (RCC_AHB1ENR_GPIOAEN << _port_num(pin)));
125-
#endif
126126
}
127127

128128
static inline void set_mode(GPIO_TypeDef *port, int pin_num, unsigned mode)
@@ -172,22 +172,22 @@ void gpio_init_analog(gpio_t pin)
172172
{
173173
/* enable clock, needed as this function can be used without calling
174174
* gpio_init first */
175-
#if defined(CPU_FAM_STM32F0) || defined (CPU_FAM_STM32F3) || defined(CPU_FAM_STM32L1)
175+
#if defined(RCC_AHBENR_GPIOAEN)
176176
periph_clk_en(AHB, (RCC_AHBENR_GPIOAEN << _port_num(pin)));
177-
#elif defined (CPU_FAM_STM32L0) || defined(CPU_FAM_STM32G0) || \
178-
defined(CPU_FAM_STM32C0)
179-
periph_clk_en(IOP, (RCC_IOPENR_GPIOAEN << _port_num(pin)));
180-
#elif defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32WB) || \
181-
defined(CPU_FAM_STM32G4) || defined(CPU_FAM_STM32L5) || \
182-
defined (CPU_FAM_STM32WL)
177+
#elif defined(RCC_AHB1ENR_GPIOAEN)
178+
periph_clk_en(AHB1, (RCC_AHB1ENR_GPIOAEN << _port_num(pin)));
179+
#elif defined(RCC_AHB2ENR_GPIOAEN)
183180
periph_clk_en(AHB2, (RCC_AHB2ENR_GPIOAEN << _port_num(pin)));
184-
#elif defined(CPU_FAM_STM32U5)
181+
#elif defined(RCC_AHB2ENR1_GPIOAEN)
185182
periph_clk_en(AHB2, (RCC_AHB2ENR1_GPIOAEN << _port_num(pin)));
186-
#elif defined(CPU_FAM_STM32MP1)
183+
#elif defined(RCC_MC_AHB4ENSETR_GPIOAEN)
187184
periph_clk_en(AHB4, (RCC_MC_AHB4ENSETR_GPIOAEN << _port_num(pin)));
185+
#elif defined (RCC_IOPENR_GPIOAEN)
186+
periph_clk_en(IOP, (RCC_IOPENR_GPIOAEN << _port_num(pin)));
188187
#else
189-
periph_clk_en(AHB1, (RCC_AHB1ENR_GPIOAEN << _port_num(pin)));
188+
#error "GPIO periph clock undefined"
190189
#endif
190+
191191
/* set to analog mode, PUPD has to be 0b00 */
192192
_port(pin)->MODER |= (0x3 << (2 * _pin_num(pin)));
193193
_port(pin)->PUPDR &= ~(0x3 << (2 * _pin_num(pin)));

0 commit comments

Comments
 (0)