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Kta cleanup#4

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2 commits merged intoOP-TEE:masterfrom
jockebech:kta_cleanup
Jul 7, 2014
Merged

Kta cleanup#4
2 commits merged intoOP-TEE:masterfrom
jockebech:kta_cleanup

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@jockebech
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@jockebech jockebech commented Jun 24, 2014

Two commits, the first one cleans up in the source, the second one is a single commit just removing the file.

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pascal-brand38 commented Jun 24, 2014

+1

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jockebech commented Jul 7, 2014

I'm adding a comment about IO macro being depracated, new patch will be uploaded soon. Note that, since this pull request should consist of two patches I'll also need to squash push one more.

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jockebech commented Jul 7, 2014

Patch uploaded, if OK, next step is to rebase + squash into two separate patches, then upload final patch set.

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pascal-brand38 commented Jul 7, 2014

+1

jockebech added 2 commits July 7, 2014 10:50
@jockebech
Removed unused KTA related defines
1f70169 
- Moved IO macro from kta_mem.h to io.h.
- Removed unused TEE_MEM_xyz defines.
- Removed code that was used for TA's in TEE RAM (impossible to reach
  that code).

Signed-off-by: Joakim Bech <[email protected]>
@jockebech
Removed file core/include/kernel/kta_mem.h
7349681 
Signed-off-by: Joakim Bech <[email protected]>
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jockebech commented Jul 7, 2014

Patches rebased to latest on master and squashed into two separate patches (one for changes and one for removing a file). This should be ready to be merged.

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jenswi-linaro commented Jul 7, 2014

+1

@ghost ghost merged commit 7349681 into OP-TEE:master Jul 7, 2014
@jockebech jockebech deleted the kta_cleanup branch July 7, 2014 11:29
@z08053520 z08053520 mentioned this pull request Nov 11, 2014
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clementfaure pushed a commit to clementfaure/optee_os that referenced this pull request Feb 27, 2020
[Review OP-TEE#4] Add small comment about smallprime product values
d887def 
Minor comment.

Signed-off-by: Clement Faure <[email protected]>
clementfaure pushed a commit to clementfaure/optee_os that referenced this pull request Mar 12, 2020
[Review OP-TEE#4] core: driver: generic resources for crypto device d…
a1892ca 
…river

Minor fixes.

Signed-off-by: Clement Faure <[email protected]>
clementfaure pushed a commit to clementfaure/optee_os that referenced this pull request Mar 12, 2020
[Review OP-TEE#4] drivers: caam: implement NXP CAAM driver - Cipher
6fa4b1f 
Minor fixes.

Signed-off-by: Clement Faure <[email protected]>
@ZhikuiRen ZhikuiRen mentioned this pull request Apr 13, 2020
Closed
ruchi393 pushed a commit to ruchi393/optee_os that referenced this pull request Apr 17, 2020
drivers: caam: Fix alignment fault caused by caam_desc_pop()
b388cc9 
Size of each JR Output ring entry is of 12 bytes for CAAM
using address pointer size as 64 bit. The descriptor address
pointer thus lies at 32 bit boundary in second output ring entry.
64 bit access of descriptor pointer at 32 bit boundary generates
alignment fault. To fix this,  descriptor address pointer should
be accessed as two 32 bit operations.

 regression_1004 Test User Crypt TA

E/TC:04 00
E/TC:04 00 Core data-abort at address 0xfc09774c (alignment fault)
E/TC:04 00  esr 0x96000021  ttbr0 0x20000fc0d0080   ttbr1 0x00000000   cidr 0x0
E/TC:04 00  cpu OP-TEE#4          cpsr 0x200001c4
E/TC:04 00  x0  00000000fc09774c x1  00000000fc096f80
E/TC:04 00  x2  0000000000000000 x3  0000008000020000
E/TC:04 00  x4  0000000000000003 x5  000000000000ca90
E/TC:04 00  x6  0000000000000000 x7  0000000000000020
E/TC:04 00  x8  00000000fc094418 x9  00000000d36adb98
E/TC:04 00  x10 0000000041001900 x11 00000000ab12a911
E/TC:04 00  x12 0000000032e4d24d x13 00000000e1b6489b
E/TC:04 00  x14 0000000000000000 x15 0000000000000000
E/TC:04 00  x16 00000000fc0ddba8 x17 0000000000000000
E/TC:04 00  x18 0000000000000000 x19 0000000000000000
E/TC:04 00  x20 000000000000270f x21 00000000fc075000
E/TC:04 00  x22 0000000000000000 x23 00000000fc09774c
E/TC:04 00  x24 00000000fc096f80 x25 0000000000000000
E/TC:04 00  x26 0000000000000001 x27 00000000fc06b000
E/TC:04 00  x28 0000000000000000 x29 00000000fc0dd970
E/TC:04 00  x30 00000000fc0193f4 elr 00000000fc01a04c
E/TC:04 00  sp_el0 00000000fc0dd970
E/TC:04 00 TEE load address @ 0xfc000000
E/TC:04 00 Call stack:
E/TC:04 00  0x00000000fc01a04c
E/TC:04 00  0x00000000fc019690
E/TC:04 00  0x00000000fc01e884
E/TC:04 00  0x00000000fc01ec30
E/TC:04 00  0x00000000fc018a74
E/TC:04 00  0x00000000fc030e18
E/TC:04 00  0x00000000fc02f5d8
E/TC:04 00  0x00000000fc02d6f8
E/TC:04 00  0x00000000fc02fde8
E/TC:04 00  0x00000000fc02d9e8
E/TC:04 00  0x00000000fc02dcb4
E/TC:04 00  0x00000000fc031bc8
E/TC:04 00  0x00000000fc032408
E/TC:04 00  0x00000000fc005370
E/TC:04 00  0x00000000fc022298
E/TC:04 00  0x00000000fc0059e4
E/TC:04 00  0x00000000fc020d5c
E/TC:04 00  0x00000000fc026bd8
E/TC:04 00  0x00000000fc0115e8
E/TC:04 00  0x00000000fc007a64
E/TC:04 00  0x00000000fc0039e0
E/TC:04 00 Panic '[abort] alignement fault!  (trap CPU)' at core/arch/arm/kernel/abort.c:477 <get_fault_type>
E/TC:04 00 TEE load address @ 0xfc000000

Signed-off-by: Ruchika Gupta <[email protected]>
ruchi393 pushed a commit to ruchi393/optee_os that referenced this pull request Apr 17, 2020
drivers: caam: Fix alignment fault caused by caam_desc_pop()
66ae78a 
Size of each JR Output ring entry is of 12 bytes for CAAM
using address pointer size as 64 bit. The descriptor address
pointer thus lies at 32 bit boundary in second output ring entry.
64 bit access of descriptor pointer at 32 bit boundary generates
alignment fault. To fix this,  descriptor address pointer should
be accessed as two 32 bit operations.

 regression_1004 Test User Crypt TA

E/TC:04 00
E/TC:04 00 Core data-abort at address 0xfc09774c (alignment fault)
E/TC:04 00  esr 0x96000021  ttbr0 0x20000fc0d0080   ttbr1 0x00000000   cidr 0x0
E/TC:04 00  cpu OP-TEE#4          cpsr 0x200001c4
E/TC:04 00  x0  00000000fc09774c x1  00000000fc096f80
E/TC:04 00  x2  0000000000000000 x3  0000008000020000
E/TC:04 00  x4  0000000000000003 x5  000000000000ca90
E/TC:04 00  x6  0000000000000000 x7  0000000000000020
E/TC:04 00  x8  00000000fc094418 x9  00000000d36adb98
E/TC:04 00  x10 0000000041001900 x11 00000000ab12a911
E/TC:04 00  x12 0000000032e4d24d x13 00000000e1b6489b
E/TC:04 00  x14 0000000000000000 x15 0000000000000000
E/TC:04 00  x16 00000000fc0ddba8 x17 0000000000000000
E/TC:04 00  x18 0000000000000000 x19 0000000000000000
E/TC:04 00  x20 000000000000270f x21 00000000fc075000
E/TC:04 00  x22 0000000000000000 x23 00000000fc09774c
E/TC:04 00  x24 00000000fc096f80 x25 0000000000000000
E/TC:04 00  x26 0000000000000001 x27 00000000fc06b000
E/TC:04 00  x28 0000000000000000 x29 00000000fc0dd970
E/TC:04 00  x30 00000000fc0193f4 elr 00000000fc01a04c
E/TC:04 00  sp_el0 00000000fc0dd970
E/TC:04 00 TEE load address @ 0xfc000000
E/TC:04 00 Call stack:
E/TC:04 00  0x00000000fc01a04c
E/TC:04 00  0x00000000fc019690
E/TC:04 00  0x00000000fc01e884
E/TC:04 00  0x00000000fc01ec30
E/TC:04 00  0x00000000fc018a74
E/TC:04 00  0x00000000fc030e18
E/TC:04 00  0x00000000fc02f5d8
E/TC:04 00  0x00000000fc02d6f8
E/TC:04 00  0x00000000fc02fde8
E/TC:04 00  0x00000000fc02d9e8
E/TC:04 00  0x00000000fc02dcb4
E/TC:04 00  0x00000000fc031bc8
E/TC:04 00  0x00000000fc032408
E/TC:04 00  0x00000000fc005370
E/TC:04 00  0x00000000fc022298
E/TC:04 00  0x00000000fc0059e4
E/TC:04 00  0x00000000fc020d5c
E/TC:04 00  0x00000000fc026bd8
E/TC:04 00  0x00000000fc0115e8
E/TC:04 00  0x00000000fc007a64
E/TC:04 00  0x00000000fc0039e0

Signed-off-by: Ruchika Gupta <[email protected]>
ruchi393 pushed a commit to ruchi393/optee_os that referenced this pull request Apr 22, 2020
drivers: caam: Fix alignment fault caused by caam_desc_pop()
16727bc 
Size of each JR Output ring entry is of 12 bytes for CAAM
using address pointer size as 64 bit. The descriptor address
pointer thus lies at 32 bit boundary in second output ring entry.
64 bit access of descriptor pointer at 32 bit boundary generates
alignment fault. To fix this,  descriptor address pointer should
be accessed as two 32 bit operations.

 regression_1004 Test User Crypt TA

E/TC:04 00
E/TC:04 00 Core data-abort at address 0xfc09774c (alignment fault)
E/TC:04 00  esr 0x96000021  ttbr0 0x20000fc0d0080   ttbr1 0x00000000   cidr 0x0
E/TC:04 00  cpu OP-TEE#4          cpsr 0x200001c4
E/TC:04 00  x0  00000000fc09774c x1  00000000fc096f80
E/TC:04 00  x2  0000000000000000 x3  0000008000020000
E/TC:04 00  x4  0000000000000003 x5  000000000000ca90
E/TC:04 00  x6  0000000000000000 x7  0000000000000020
E/TC:04 00  x8  00000000fc094418 x9  00000000d36adb98
E/TC:04 00  x10 0000000041001900 x11 00000000ab12a911
E/TC:04 00  x12 0000000032e4d24d x13 00000000e1b6489b
E/TC:04 00  x14 0000000000000000 x15 0000000000000000
E/TC:04 00  x16 00000000fc0ddba8 x17 0000000000000000
E/TC:04 00  x18 0000000000000000 x19 0000000000000000
E/TC:04 00  x20 000000000000270f x21 00000000fc075000
E/TC:04 00  x22 0000000000000000 x23 00000000fc09774c
E/TC:04 00  x24 00000000fc096f80 x25 0000000000000000
E/TC:04 00  x26 0000000000000001 x27 00000000fc06b000
E/TC:04 00  x28 0000000000000000 x29 00000000fc0dd970
E/TC:04 00  x30 00000000fc0193f4 elr 00000000fc01a04c
E/TC:04 00  sp_el0 00000000fc0dd970
E/TC:04 00 TEE load address @ 0xfc000000
E/TC:04 00 Call stack:
E/TC:04 00  0x00000000fc01a04c
E/TC:04 00  0x00000000fc019690
E/TC:04 00  0x00000000fc01e884
E/TC:04 00  0x00000000fc01ec30
E/TC:04 00  0x00000000fc018a74
E/TC:04 00  0x00000000fc030e18
E/TC:04 00  0x00000000fc02f5d8
E/TC:04 00  0x00000000fc02d6f8
E/TC:04 00  0x00000000fc02fde8
E/TC:04 00  0x00000000fc02d9e8
E/TC:04 00  0x00000000fc02dcb4
E/TC:04 00  0x00000000fc031bc8
E/TC:04 00  0x00000000fc032408
E/TC:04 00  0x00000000fc005370
E/TC:04 00  0x00000000fc022298
E/TC:04 00  0x00000000fc0059e4
E/TC:04 00  0x00000000fc020d5c
E/TC:04 00  0x00000000fc026bd8
E/TC:04 00  0x00000000fc0115e8
E/TC:04 00  0x00000000fc007a64
E/TC:04 00  0x00000000fc0039e0

Signed-off-by: Ruchika Gupta <[email protected]>
ruchi393 pushed a commit to ruchi393/optee_os that referenced this pull request Apr 24, 2020
drivers: caam: Fix alignment fault caused by caam_desc_pop()
8670b62 
Size of each JR Output ring entry is of 12 bytes for CAAM
using address pointer size as 64 bit. The descriptor address
pointer thus lies at 32 bit boundary in second output ring entry.
64 bit access of descriptor pointer at 32 bit boundary generates
alignment fault. To fix this,  descriptor address pointer should
be accessed as two 32 bit operations.

 regression_1004 Test User Crypt TA

E/TC:04 00
E/TC:04 00 Core data-abort at address 0xfc09774c (alignment fault)
E/TC:04 00  esr 0x96000021  ttbr0 0x20000fc0d0080   ttbr1 0x00000000   cidr 0x0
E/TC:04 00  cpu OP-TEE#4          cpsr 0x200001c4
E/TC:04 00  x0  00000000fc09774c x1  00000000fc096f80
E/TC:04 00  x2  0000000000000000 x3  0000008000020000
E/TC:04 00  x4  0000000000000003 x5  000000000000ca90
E/TC:04 00  x6  0000000000000000 x7  0000000000000020
E/TC:04 00  x8  00000000fc094418 x9  00000000d36adb98
E/TC:04 00  x10 0000000041001900 x11 00000000ab12a911
E/TC:04 00  x12 0000000032e4d24d x13 00000000e1b6489b
E/TC:04 00  x14 0000000000000000 x15 0000000000000000
E/TC:04 00  x16 00000000fc0ddba8 x17 0000000000000000
E/TC:04 00  x18 0000000000000000 x19 0000000000000000
E/TC:04 00  x20 000000000000270f x21 00000000fc075000
E/TC:04 00  x22 0000000000000000 x23 00000000fc09774c
E/TC:04 00  x24 00000000fc096f80 x25 0000000000000000
E/TC:04 00  x26 0000000000000001 x27 00000000fc06b000
E/TC:04 00  x28 0000000000000000 x29 00000000fc0dd970
E/TC:04 00  x30 00000000fc0193f4 elr 00000000fc01a04c
E/TC:04 00  sp_el0 00000000fc0dd970
E/TC:04 00 TEE load address @ 0xfc000000
E/TC:04 00 Call stack:
E/TC:04 00  0x00000000fc01a04c
E/TC:04 00  0x00000000fc019690
E/TC:04 00  0x00000000fc01e884
E/TC:04 00  0x00000000fc01ec30
E/TC:04 00  0x00000000fc018a74
E/TC:04 00  0x00000000fc030e18
E/TC:04 00  0x00000000fc02f5d8
E/TC:04 00  0x00000000fc02d6f8
E/TC:04 00  0x00000000fc02fde8
E/TC:04 00  0x00000000fc02d9e8
E/TC:04 00  0x00000000fc02dcb4
E/TC:04 00  0x00000000fc031bc8
E/TC:04 00  0x00000000fc032408
E/TC:04 00  0x00000000fc005370
E/TC:04 00  0x00000000fc022298
E/TC:04 00  0x00000000fc0059e4
E/TC:04 00  0x00000000fc020d5c
E/TC:04 00  0x00000000fc026bd8
E/TC:04 00  0x00000000fc0115e8
E/TC:04 00  0x00000000fc007a64
E/TC:04 00  0x00000000fc0039e0

Signed-off-by: Ruchika Gupta <[email protected]>
Reviewed-by: Sahil Malhotra <[email protected]>
Reviewed-by: Clement Faure <[email protected]>
ruchi393 pushed a commit to ruchi393/optee_os that referenced this pull request Apr 24, 2020
drivers: caam: Fix alignment fault caused by caam_desc_pop()
3cacaf4 
Size of each JR Output ring entry is of 12 bytes for CAAM
using address pointer size as 64 bit. The descriptor address
pointer thus lies at 32 bit boundary in second output ring entry.
64 bit access of descriptor pointer at 32 bit boundary generates
alignment fault. To fix this,  descriptor address pointer should
be accessed as two 32 bit operations.

 regression_1004 Test User Crypt TA

E/TC:04 00
E/TC:04 00 Core data-abort at address 0xfc09774c (alignment fault)
E/TC:04 00  esr 0x96000021  ttbr0 0x20000fc0d0080   ttbr1 0x00000000   cidr 0x0
E/TC:04 00  cpu OP-TEE#4          cpsr 0x200001c4
E/TC:04 00  x0  00000000fc09774c x1  00000000fc096f80
E/TC:04 00  x2  0000000000000000 x3  0000008000020000
E/TC:04 00  x4  0000000000000003 x5  000000000000ca90
E/TC:04 00  x6  0000000000000000 x7  0000000000000020
E/TC:04 00  x8  00000000fc094418 x9  00000000d36adb98
E/TC:04 00  x10 0000000041001900 x11 00000000ab12a911
E/TC:04 00  x12 0000000032e4d24d x13 00000000e1b6489b
E/TC:04 00  x14 0000000000000000 x15 0000000000000000
E/TC:04 00  x16 00000000fc0ddba8 x17 0000000000000000
E/TC:04 00  x18 0000000000000000 x19 0000000000000000
E/TC:04 00  x20 000000000000270f x21 00000000fc075000
E/TC:04 00  x22 0000000000000000 x23 00000000fc09774c
E/TC:04 00  x24 00000000fc096f80 x25 0000000000000000
E/TC:04 00  x26 0000000000000001 x27 00000000fc06b000
E/TC:04 00  x28 0000000000000000 x29 00000000fc0dd970
E/TC:04 00  x30 00000000fc0193f4 elr 00000000fc01a04c
E/TC:04 00  sp_el0 00000000fc0dd970
E/TC:04 00 TEE load address @ 0xfc000000
E/TC:04 00 Call stack:
E/TC:04 00  0x00000000fc01a04c
E/TC:04 00  0x00000000fc019690
E/TC:04 00  0x00000000fc01e884
E/TC:04 00  0x00000000fc01ec30
E/TC:04 00  0x00000000fc018a74
E/TC:04 00  0x00000000fc030e18
E/TC:04 00  0x00000000fc02f5d8
E/TC:04 00  0x00000000fc02d6f8
E/TC:04 00  0x00000000fc02fde8
E/TC:04 00  0x00000000fc02d9e8
E/TC:04 00  0x00000000fc02dcb4
E/TC:04 00  0x00000000fc031bc8
E/TC:04 00  0x00000000fc032408
E/TC:04 00  0x00000000fc005370
E/TC:04 00  0x00000000fc022298
E/TC:04 00  0x00000000fc0059e4
E/TC:04 00  0x00000000fc020d5c
E/TC:04 00  0x00000000fc026bd8
E/TC:04 00  0x00000000fc0115e8
E/TC:04 00  0x00000000fc007a64
E/TC:04 00  0x00000000fc0039e0

Signed-off-by: Ruchika Gupta <[email protected]>
Reviewed-by: Sahil Malhotra <[email protected]>
Reviewed-by: Clement Faure <[email protected]>
ruchi393 pushed a commit to ruchi393/optee_os that referenced this pull request Apr 24, 2020
drivers: caam: Fix alignment fault caused by caam_desc_pop()
c456a80 
Size of each JR Output ring entry is of 12 bytes for CAAM
using address pointer size as 64 bit. The descriptor address
pointer thus lies at 32 bit boundary in second output ring entry.
64 bit access of descriptor pointer at 32 bit boundary generates
alignment fault. To fix this,  descriptor address pointer should
be accessed as two 32 bit operations.

 regression_1004 Test User Crypt TA

E/TC:04 00
E/TC:04 00 Core data-abort at address 0xfc09774c (alignment fault)
E/TC:04 00  esr 0x96000021  ttbr0 0x20000fc0d0080   ttbr1 0x00000000   cidr 0x0
E/TC:04 00  cpu OP-TEE#4          cpsr 0x200001c4
E/TC:04 00  x0  00000000fc09774c x1  00000000fc096f80
E/TC:04 00  x2  0000000000000000 x3  0000008000020000
E/TC:04 00  x4  0000000000000003 x5  000000000000ca90
E/TC:04 00  x6  0000000000000000 x7  0000000000000020
E/TC:04 00  x8  00000000fc094418 x9  00000000d36adb98
E/TC:04 00  x10 0000000041001900 x11 00000000ab12a911
E/TC:04 00  x12 0000000032e4d24d x13 00000000e1b6489b
E/TC:04 00  x14 0000000000000000 x15 0000000000000000
E/TC:04 00  x16 00000000fc0ddba8 x17 0000000000000000
E/TC:04 00  x18 0000000000000000 x19 0000000000000000
E/TC:04 00  x20 000000000000270f x21 00000000fc075000
E/TC:04 00  x22 0000000000000000 x23 00000000fc09774c
E/TC:04 00  x24 00000000fc096f80 x25 0000000000000000
E/TC:04 00  x26 0000000000000001 x27 00000000fc06b000
E/TC:04 00  x28 0000000000000000 x29 00000000fc0dd970
E/TC:04 00  x30 00000000fc0193f4 elr 00000000fc01a04c
E/TC:04 00  sp_el0 00000000fc0dd970
E/TC:04 00 TEE load address @ 0xfc000000
E/TC:04 00 Call stack:
E/TC:04 00  0x00000000fc01a04c
E/TC:04 00  0x00000000fc019690
E/TC:04 00  0x00000000fc01e884
E/TC:04 00  0x00000000fc01ec30
E/TC:04 00  0x00000000fc018a74
E/TC:04 00  0x00000000fc030e18
E/TC:04 00  0x00000000fc02f5d8
E/TC:04 00  0x00000000fc02d6f8
E/TC:04 00  0x00000000fc02fde8
E/TC:04 00  0x00000000fc02d9e8
E/TC:04 00  0x00000000fc02dcb4
E/TC:04 00  0x00000000fc031bc8
E/TC:04 00  0x00000000fc032408
E/TC:04 00  0x00000000fc005370
E/TC:04 00  0x00000000fc022298
E/TC:04 00  0x00000000fc0059e4
E/TC:04 00  0x00000000fc020d5c
E/TC:04 00  0x00000000fc026bd8
E/TC:04 00  0x00000000fc0115e8
E/TC:04 00  0x00000000fc007a64
E/TC:04 00  0x00000000fc0039e0

Signed-off-by: Ruchika Gupta <[email protected]>
Reviewed-by: Sahil Malhotra <[email protected]>
Reviewed-by: Clement Faure <[email protected]>
vingu-linaro pushed a commit to vingu-linaro/optee_os that referenced this pull request May 20, 2020
@etienne-lms
[port] plat-stm32mp1: upgrade clock driver to support SCMI clocks
62a54d8 
A squashed series of changes in stm32mp1 clock driver for
supporting SCMI server as a clock consumer. These changes
have not been upstream yet in OP-TEE OS. Below the details.

Signed-off-by: Etienne Carriere <[email protected]>

### Commit message OP-TEE#1
plat-stm32mp1: clock: remove oscillators and PLLs from shared resources

Oscillators, PLL1 and PLL2 are not resources allocated upon platform
configuration, these are always under secure world control. This change
removes them fro the list of the shared resources.

Since these resource are always secure, there is no need to look up
clock tree when a leaf clock is registered as secure to know which
parent clock(s) is/are secure. This removes functions from
shared_resources.c and stm32mp1_clk.c.

stm32mp_register_clock_parents_secure() can be removed and all its
private dependencies.

Signed-off-by: Etienne Carriere <[email protected]>

### Commit message OP-TEE#2
plat-stm32mp1: clock: fix mcu/axi parent clock

Correct MCU clock parent selector: MCU subsystem clock is derived
from clock  PLL3_P, not PLL3.

Correct AXI clock parent selector: AXI subsystem clock is derived
from clock  PLL2_P, not PLL2.

This change also renames MCU clock and AXI clock resources to
prevent confusion.

Signed-off-by: Etienne Carriere <[email protected]>

### Commit message OP-TEE#3
plat-stm32mp1: clock: allow tree lookup for several system clocks

Oscillators, PLLs and some system clocks can be related straight to
a parent clock. Prior this change were only oscillators and few
clocks supported by this look up. This changes adds PLLs and other
system clocks. This enables for flexible use of clock tree exploration
when computing a clock frequency value.

Signed-off-by: Etienne Carriere <[email protected]>

### Commit message OP-TEE#4
plat-stm32mp1: clock: handle always on clocks

Oscillators and PLLs are not gated on stm32mp_clk_enable/disable()
calls. This change allows function to blindly call clock gating function
on always on clocks. Gating these clock is out of the scope of this
change even if preferred for power consumption optimization.

Signed-off-by: Etienne Carriere <[email protected]>

### Commit message OP-TEE#5
plat-stm32mp1: clock: add rtc as gateable clock

Add clock RTC as a clock one can access through the
stm32_util.h API function stm32_clock_*().

Signed-off-by: Etienne Carriere <[email protected]>

### Commit message OP-TEE#6
plat-stm32mp1: clock: enable some secure clocks at init

With this change some system clock are enabled by core at
boot time and have a reference counter synchronized with
the clock hardware state.

Signed-off-by: Etienne Carriere <[email protected]>

### Commit message OP-TEE#7
plat-stm32mp1: factorize rtc clock gating bit position

For consistency, define macro RCC_BDCR_RTCCKEN_POS in stm32mp1_rcc.h
to factorize definition of the RTC clock gating resources.

Signed-off-by: Etienne Carriere <[email protected]>

### Commit message OP-TEE#8
plat-stm32mp1: add mdma secure clock

Add support for MDMA secure clock.

Signed-off-by: Etienne Carriere <[email protected]>

### Commit message OP-TEE#9
plat-stm32mp1: remove unused usb non-secure clock

Remove unused clocks USBO_CLK and USBPHY_K resources.

Signed-off-by: Etienne Carriere <[email protected]>

### Commit message OP-TEE#10
plat-stm32mp1: clock: secure and non-secure gateable clocks

Array stm32mp1_clk_gate[] defines the clock resources. This change
add a secure attribute to the clock: secure upon RCC[TZEN] (SEC),
secure upon RCC[TZEN] and RCC[MCKPROT] (MKP) or always accessible
from non-secure (N_S).

At init, lookup clock tree to ensure that parents of a secure clock
are registered a secure resources in the shared_resources.c driver.

Non-secure clock that OP-TEE expect to enable are enabled without
increase the clock refcount. For consistency, such clocks are not
disabled by core. Such clocks may be accessed by OP-TEE Core when
the non-secure world is not executing, for example at boot time
or could be when system is suspending/resuming.

Signed-off-by: Etienne Carriere <[email protected]>

### Commit message OP-TEE#11
plat-stm32mp1: clock: fixup parent clock ids

Use _UNKNOWN_ID macro rather than 0xff for clocks parent IDs
that do not relate to a gateable clock.

Fix parent clock ID _HSE_KER_DIV2 that relates to clock
CK_HSE_KER_DIV2, not CK_HSE.

Signed-off-by: Etienne Carriere <[email protected]>

### Commit message OP-TEE#12
plat-stm32mp1: clock: don't embed unused non-secure uart clock

Embed UART parent clock resource upon CFG_WITH_NSEC_UARTS=y.
This configuration switch was already used to embed or not
the non-secure UART clocks but not the resources used to
looks there ascendant clocks.

Signed-off-by: Etienne Carriere <[email protected]>

### Commit message OP-TEE#13
plat-stm32mp1: shared resources: get shared clock controller state

stm32mp_nsec_can_access_clock() reports whether a clock is assigned
to the secure world only, or when it can be manipulated by the
non-secure world.

Signed-off-by: Etienne Carriere <[email protected]>

### Commit message OP-TEE#14
plat-stm32mp1: shared resource: remove unused stm32mp_clock_is_*()

Remove unused functions stm32mp_clock_is_shareable(),
stm32mp_clock_is_shared() and stm32mp_clock_is_non_secure().

Signed-off-by: Etienne Carriere <[email protected]>
@chenlifu2015 chenlifu2015 mentioned this pull request May 27, 2020
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@mtech2018 mtech2018 mentioned this pull request Jun 1, 2020
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@angelina-zhao angelina-zhao mentioned this pull request Jul 21, 2020
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jenswi-linaro added a commit that referenced this pull request Feb 23, 2021
@jenswi-linaro
ldelf: assert result in print_seg()
6264318 
Adds a few assert() that  snprintf() succeeds in print_seg().

This fixes coverity scan:
CID 1501815 (#4 of 4): Unchecked return value (CHECKED_RETURN)

Signed-off-by: Jens Wiklander <[email protected]>
jforissier pushed a commit that referenced this pull request Feb 24, 2021
@jenswi-linaro @jforissier
ldelf: assert result in print_seg()
e6e0ed5 
Adds a few assert() that  snprintf() succeeds in print_seg().

This fixes coverity scan:
CID 1501815 (#4 of 4): Unchecked return value (CHECKED_RETURN)

Reviewed-by: Jerome Forissier <[email protected]>
Signed-off-by: Jens Wiklander <[email protected]>
@carrionbent carrionbent mentioned this pull request Mar 4, 2021
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a-rybakov added a commit to a-rybakov/optee_os-1 that referenced this pull request Jun 7, 2021
@a-rybakov
fix comments by Etienne part OP-TEE#4
423c2e7 
Fixed indent in plat-synquacer/main.c
Size changed to 1 for hi16xx_rng and stm32_rng

Signed-off-by: Anton Rybakov <[email protected]>
@zzbios zzbios mentioned this pull request Jan 31, 2023
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@zzbios zzbios mentioned this pull request Apr 6, 2023
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@jcmrodrigues jcmrodrigues mentioned this pull request Dec 12, 2024
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@yuvraj1803 yuvraj1803 mentioned this pull request Dec 16, 2024
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@Flynnsin Flynnsin mentioned this pull request Sep 30, 2025
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3 participants

@jockebech @pascal-brand38 @jenswi-linaro