@@ -20,38 +20,24 @@ extern "C" {
2020#endif
2121
2222#include <stdint.h>
23- #include <stdbool.h>
2423#include "esp_err.h"
2524#include "driver/gpio.h"
2625#include "soc/adc_channel.h"
2726
2827typedef enum {
29- ADC_ATTEN_DB_0 = 0 , /*!<The input voltage of ADC will be reduced to about 1/1 */
30- ADC_ATTEN_DB_2_5 = 1 , /*!<The input voltage of ADC will be reduced to about 1/1.34 */
31- ADC_ATTEN_DB_6 = 2 , /*!<The input voltage of ADC will be reduced to about 1/2 */
32- ADC_ATTEN_DB_11 = 3 , /*!<The input voltage of ADC will be reduced to about 1/3.6*/
33- ADC_ATTEN_MAX ,
28+ ADC_ATTEN_0db = 0 , /*!<The input voltage of ADC will be reduced to about 1/1 */
29+ ADC_ATTEN_2_5db = 1 , /*!<The input voltage of ADC will be reduced to about 1/1.34 */
30+ ADC_ATTEN_6db = 2 , /*!<The input voltage of ADC will be reduced to about 1/2 */
31+ ADC_ATTEN_11db = 3 , /*!<The input voltage of ADC will be reduced to about 1/3.6*/
3432} adc_atten_t ;
3533
3634typedef enum {
37- ADC_WIDTH_BIT_9 = 0 , /*!< ADC capture width is 9Bit*/
38- ADC_WIDTH_BIT_10 = 1 , /*!< ADC capture width is 10Bit*/
39- ADC_WIDTH_BIT_11 = 2 , /*!< ADC capture width is 11Bit*/
40- ADC_WIDTH_BIT_12 = 3 , /*!< ADC capture width is 12Bit*/
41- ADC_WIDTH_MAX ,
35+ ADC_WIDTH_9Bit = 0 , /*!< ADC capture width is 9Bit*/
36+ ADC_WIDTH_10Bit = 1 , /*!< ADC capture width is 10Bit*/
37+ ADC_WIDTH_11Bit = 2 , /*!< ADC capture width is 11Bit*/
38+ ADC_WIDTH_12Bit = 3 , /*!< ADC capture width is 12Bit*/
4239} adc_bits_width_t ;
4340
44- //this definitions are only for being back-compatible
45- #define ADC_ATTEN_0db ADC_ATTEN_DB_0
46- #define ADC_ATTEN_2_5db ADC_ATTEN_DB_2_5
47- #define ADC_ATTEN_6db ADC_ATTEN_DB_6
48- #define ADC_ATTEN_11db ADC_ATTEN_DB_11
49- //this definitions are only for being back-compatible
50- #define ADC_WIDTH_9Bit ADC_WIDTH_BIT_9
51- #define ADC_WIDTH_10Bit ADC_WIDTH_BIT_10
52- #define ADC_WIDTH_11Bit ADC_WIDTH_BIT_11
53- #define ADC_WIDTH_12Bit ADC_WIDTH_BIT_12
54-
5541typedef enum {
5642 ADC1_CHANNEL_0 = 0 , /*!< ADC1 channel 0 is GPIO36 */
5743 ADC1_CHANNEL_1 , /*!< ADC1 channel 1 is GPIO37 */
@@ -78,43 +64,11 @@ typedef enum {
7864 ADC2_CHANNEL_MAX ,
7965} adc2_channel_t ;
8066
81- typedef enum {
82- ADC_CHANNEL_0 = 0 , /*!< ADC channel */
83- ADC_CHANNEL_1 , /*!< ADC channel */
84- ADC_CHANNEL_2 , /*!< ADC channel */
85- ADC_CHANNEL_3 , /*!< ADC channel */
86- ADC_CHANNEL_4 , /*!< ADC channel */
87- ADC_CHANNEL_5 , /*!< ADC channel */
88- ADC_CHANNEL_6 , /*!< ADC channel */
89- ADC_CHANNEL_7 , /*!< ADC channel */
90- ADC_CHANNEL_8 , /*!< ADC channel */
91- ADC_CHANNEL_9 , /*!< ADC channel */
92- ADC_CHANNEL_MAX ,
93- } adc_channel_t ;
94-
95- typedef enum {
96- ADC_UNIT_1 = 1 , /*!< SAR ADC 1*/
97- ADC_UNIT_2 = 2 , /*!< SAR ADC 2, not supported yet*/
98- ADC_UNIT_BOTH = 3 , /*!< SAR ADC 1 and 2, not supported yet */
99- ADC_UNIT_ALTER = 7 , /*!< SAR ADC 1 and 2 alternative mode, not supported yet */
100- ADC_UNIT_MAX ,
101- } adc_unit_t ;
102-
103- typedef enum {
104- ADC_ENCODE_12BIT , /*!< ADC to I2S data format, [15:12]-channel [11:0]-12 bits ADC data */
105- ADC_ENCODE_11BIT , /*!< ADC to I2S data format, [15]-1 [14:11]-channel [10:0]-11 bits ADC data */
106- ADC_ENCODE_MAX ,
107- } adc_i2s_encode_t ;
108-
109- typedef enum {
110- ADC_I2S_DATA_SRC_IO_SIG = 0 , /*!< I2S data from GPIO matrix signal */
111- ADC_I2S_DATA_SRC_ADC = 1 , /*!< I2S data from ADC */
112- ADC_I2S_DATA_SRC_MAX ,
113- } adc_i2s_source_t ;
114-
11567/**
116- * @brief Configure ADC1 capture width, meanwhile enable output invert for ADC1.
68+ * @brief Configure ADC1 capture width.
69+ *
11770 * The configuration is for all channels of ADC1
71+ *
11872 * @param width_bit Bit capture width for ADC1
11973 *
12074 * @return
@@ -123,16 +77,6 @@ typedef enum {
12377 */
12478esp_err_t adc1_config_width (adc_bits_width_t width_bit );
12579
126- /**
127- * @brief Configure ADC capture width.
128- * @param adc_unit ADC unit index
129- * @param width_bit Bit capture width for ADC unit.
130- * @return
131- * - ESP_OK success
132- * - ESP_ERR_INVALID_ARG Parameter error
133- */
134- esp_err_t adc_set_data_width (adc_unit_t adc_unit , adc_bits_width_t width_bit );
135-
13680/**
13781 * @brief Configure the ADC1 channel, including setting attenuation.
13882 *
@@ -145,10 +89,10 @@ esp_err_t adc_set_data_width(adc_unit_t adc_unit, adc_bits_width_t width_bit);
14589 *
14690 * When VDD_A is 3.3V:
14791 *
148- * - 0dB attenuaton (ADC_ATTEN_DB_0 ) gives full-scale voltage 1.1V
149- * - 2.5dB attenuation (ADC_ATTEN_DB_2_5 ) gives full-scale voltage 1.5V
150- * - 6dB attenuation (ADC_ATTEN_DB_6 ) gives full-scale voltage 2.2V
151- * - 11dB attenuation (ADC_ATTEN_DB_11 ) gives full-scale voltage 3.9V (see note below)
92+ * - 0dB attenuaton (ADC_ATTEN_0db ) gives full-scale voltage 1.1V
93+ * - 2.5dB attenuation (ADC_ATTEN_2_5db ) gives full-scale voltage 1.5V
94+ * - 6dB attenuation (ADC_ATTEN_6db ) gives full-scale voltage 2.2V
95+ * - 11dB attenuation (ADC_ATTEN_11db ) gives full-scale voltage 3.9V (see note below)
15296 *
15397 * @note The full-scale voltage is the voltage corresponding to a maximum reading (depending on ADC1 configured
15498 * bit width, this value is: 4095 for 12-bits, 2047 for 11-bits, 1023 for 10-bits, 511 for 9 bits.)
@@ -190,62 +134,6 @@ int adc1_get_raw(adc1_channel_t channel);
190134int adc1_get_voltage (adc1_channel_t channel ) __attribute__((deprecated ));
191135/** @endcond */
192136
193- /**
194- * @brief Power on SAR ADC
195- */
196- void adc_power_on ();
197-
198- /**
199- * @brief Power off SAR ADC
200- */
201- void adc_power_off ();
202-
203- /**
204- * @brief Initialize ADC pad
205- * @param adc_unit ADC unit index
206- * @param channel ADC channel index
207- * @return
208- * - ESP_OK success
209- * - ESP_ERR_INVALID_ARG Parameter error
210- */
211- esp_err_t adc_gpio_init (adc_unit_t adc_unit , adc_channel_t channel );
212-
213- /**
214- * @brief Set ADC data invert
215- * @param adc_unit ADC unit index
216- * @param inv_en whether enable data invert
217- * @return
218- * - ESP_OK success
219- * - ESP_ERR_INVALID_ARG Parameter error
220- */
221- esp_err_t adc_set_data_inv (adc_unit_t adc_unit , bool inv_en );
222-
223- /**
224- * @brief Set ADC source clock
225- * @param clk_div ADC clock divider, ADC clock is divided from APB clock
226- * @return
227- * - ESP_OK success
228- */
229- esp_err_t adc_set_clk_div (uint8_t clk_div );
230-
231- /**
232- * @brief Set I2S data source
233- * @param src I2S DMA data source, I2S DMA can get data from digital signals or from ADC.
234- * @return
235- * - ESP_OK success
236- */
237- esp_err_t adc_set_i2s_data_source (adc_i2s_source_t src );
238-
239- /**
240- * @brief Initialize I2S ADC mode
241- * @param adc_unit ADC unit index
242- * @param channel ADC channel index
243- * @return
244- * - ESP_OK success
245- * - ESP_ERR_INVALID_ARG Parameter error
246- */
247- esp_err_t adc_i2s_mode_init (adc_unit_t adc_unit , adc_channel_t channel );
248-
249137/**
250138 * @brief Configure ADC1 to be usable by the ULP
251139 *
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