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GVictorsd/README.md

Victor Swaroop

@GVictorsd

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  1. riscie riscie Public

    A five stage piplined, RISCV processor written in Verilog HDL

    Verilog 1

  2. simpleComputerWeb simpleComputerWeb Public

    Web app for the simple-computer.

    Verilog 1

  3. tqntq tqntq Public

    HTML

  4. gvictorsd.github.io gvictorsd.github.io Public

    My Personal Website

    HTML 1

  5. MyMos6502 MyMos6502 Public

    A Verilog implementation of the Mos 6502 done as one of my personal projects.

    Verilog 1

  6. schedulee schedulee Public

    IOT based room scheduling system

    JavaScript