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Hardware description of an handwritten digit recognition algorithm

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Computer Engineering Project: High level synthesis of convolutional neural network

Group project regarding the implementation of an handwritten digit recognition algorithm (convolutional neural network) on an FPGA board by using high level synthesis. We used Xilinx's development platform (Vitis HLS 2021.2) and the FPGA's performance was evaluated against the C++ and Python applications. This is formally part of the Project in Computer Science and Engineering course at Politecnico di Milano (A.Y. 2021 / 2022).

Group members - Advisor: Prof. D. Zoni

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