@@ -1424,17 +1424,31 @@ class RepresentationSelector {
14241424 return jsgraph_->simplified ();
14251425 }
14261426
1427- void LowerToCheckedInt32Mul (Node* node, Truncation truncation,
1428- Type input0_type, Type input1_type) {
1429- // If one of the inputs is positive and/or truncation is being applied,
1430- // there is no need to return -0.
1431- CheckForMinusZeroMode mz_mode =
1432- truncation.IdentifiesZeroAndMinusZero () ||
1433- IsSomePositiveOrderedNumber (input0_type) ||
1434- IsSomePositiveOrderedNumber (input1_type)
1435- ? CheckForMinusZeroMode::kDontCheckForMinusZero
1436- : CheckForMinusZeroMode::kCheckForMinusZero ;
1437- ChangeOp (node, simplified ()->CheckedInt32Mul (mz_mode));
1427+ template <Phase T>
1428+ void VisitForCheckedInt32Mul (Node* node, Truncation truncation,
1429+ Type input0_type, Type input1_type,
1430+ UseInfo input_use) {
1431+ DCHECK_EQ (node->opcode (), IrOpcode::kSpeculativeNumberMultiply );
1432+ // A -0 input is impossible or will cause a deopt.
1433+ DCHECK (BothInputsAre (node, Type::Signed32 ()) ||
1434+ !input_use.truncation ().IdentifiesZeroAndMinusZero ());
1435+
1436+ CheckForMinusZeroMode mz_mode;
1437+ Type restriction;
1438+ if (IsSomePositiveOrderedNumber (input0_type) ||
1439+ IsSomePositiveOrderedNumber (input1_type)) {
1440+ mz_mode = CheckForMinusZeroMode::kDontCheckForMinusZero ;
1441+ restriction = Type::Signed32 ();
1442+ } else if (truncation.IdentifiesZeroAndMinusZero ()) {
1443+ mz_mode = CheckForMinusZeroMode::kDontCheckForMinusZero ;
1444+ restriction = Type::Signed32OrMinusZero ();
1445+ } else {
1446+ mz_mode = CheckForMinusZeroMode::kCheckForMinusZero ;
1447+ restriction = Type::Signed32 ();
1448+ }
1449+
1450+ VisitBinop<T>(node, input_use, MachineRepresentation::kWord32 , restriction);
1451+ if (lower<T>()) ChangeOp (node, simplified ()->CheckedInt32Mul (mz_mode));
14381452 }
14391453
14401454 void ChangeToInt32OverflowOp (Node* node) {
@@ -1622,12 +1636,22 @@ class RepresentationSelector {
16221636 VisitBinop<T>(node, lhs_use, rhs_use, MachineRepresentation::kWord32 );
16231637 if (lower<T>()) DeferReplacement (node, lowering->Int32Mod (node));
16241638 } else if (BothInputsAre (node, Type::Unsigned32OrMinusZeroOrNaN ())) {
1639+ Type const restriction =
1640+ truncation.IdentifiesZeroAndMinusZero () &&
1641+ TypeOf (node->InputAt (0 )).Maybe (Type::MinusZero ())
1642+ ? Type::Unsigned32OrMinusZero ()
1643+ : Type::Unsigned32 ();
16251644 VisitBinop<T>(node, lhs_use, rhs_use, MachineRepresentation::kWord32 ,
1626- Type::Unsigned32 () );
1645+ restriction );
16271646 if (lower<T>()) ChangeToUint32OverflowOp (node);
16281647 } else {
1648+ Type const restriction =
1649+ truncation.IdentifiesZeroAndMinusZero () &&
1650+ TypeOf (node->InputAt (0 )).Maybe (Type::MinusZero ())
1651+ ? Type::Signed32OrMinusZero ()
1652+ : Type::Signed32 ();
16291653 VisitBinop<T>(node, lhs_use, rhs_use, MachineRepresentation::kWord32 ,
1630- Type::Signed32 () );
1654+ restriction );
16311655 if (lower<T>()) ChangeToInt32OverflowOp (node);
16321656 }
16331657 return ;
@@ -2261,22 +2285,16 @@ class RepresentationSelector {
22612285 if (BothInputsAre (node, Type::Signed32 ())) {
22622286 // If both inputs and feedback are int32, use the overflow op.
22632287 if (hint == NumberOperationHint::kSignedSmall ) {
2264- VisitBinop<T>(node, UseInfo::TruncatingWord32 (),
2265- MachineRepresentation::kWord32 , Type::Signed32 ());
2266- if (lower<T>()) {
2267- LowerToCheckedInt32Mul (node, truncation, input0_type,
2268- input1_type);
2269- }
2288+ VisitForCheckedInt32Mul<T>(node, truncation, input0_type,
2289+ input1_type,
2290+ UseInfo::TruncatingWord32 ());
22702291 return ;
22712292 }
22722293 }
22732294
22742295 if (hint == NumberOperationHint::kSignedSmall ) {
2275- VisitBinop<T>(node, CheckedUseInfoAsWord32FromHint (hint),
2276- MachineRepresentation::kWord32 , Type::Signed32 ());
2277- if (lower<T>()) {
2278- LowerToCheckedInt32Mul (node, truncation, input0_type, input1_type);
2279- }
2296+ VisitForCheckedInt32Mul<T>(node, truncation, input0_type, input1_type,
2297+ CheckedUseInfoAsWord32FromHint (hint));
22802298 return ;
22812299 }
22822300
@@ -4011,7 +4029,6 @@ template <>
40114029void RepresentationSelector::SetOutput<RETYPE>(
40124030 Node* node, MachineRepresentation representation, Type restriction_type) {
40134031 NodeInfo* const info = GetInfo (node);
4014- DCHECK (info->restriction_type ().Is (restriction_type));
40154032 DCHECK (restriction_type.Is (info->restriction_type ()));
40164033 info->set_output (representation);
40174034}
@@ -4021,7 +4038,6 @@ void RepresentationSelector::SetOutput<LOWER>(
40214038 Node* node, MachineRepresentation representation, Type restriction_type) {
40224039 NodeInfo* const info = GetInfo (node);
40234040 DCHECK_EQ (info->representation (), representation);
4024- DCHECK (info->restriction_type ().Is (restriction_type));
40254041 DCHECK (restriction_type.Is (info->restriction_type ()));
40264042 USE (info);
40274043}
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