Add the Page Global Enable flag to the Cyrix III#3807
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Summary
Adds the Page Global enable feature (CR4 mask, CPUID flag, toggle bit in the Feature Control Register MSR) to the VIA Cyrix III. Also removes pointlessly setting the default value of said MSR's variable on CPUs that don't support it (i.e. any non IDT/Centaur/VIA CPU).
Checklist
References
VIA Cyrix III Processor Datasheet