I’m designing a carrier board for the Jetson Orin Nano. Section 3.1 QSPI Boot from the Product Design Guide says that secondary storage must be provided. I chose to use the SSD through USB 3.2 option.
The Jetson power sequencing requirements are rather strict. When should I supply power to the SSD USB VBUS? Should I supply it at the same time as VDD_IN so that the Jetson immediately has access to its boot files? Should I instead supply it with the rest of the Carrier Board Supplies, after SYS_RESET* has gone high?
Can GPIO00 enable multiple USB load switches? I have two USB 3 jacks: one going to the required external memory, and another connected to a camera. I have connected both load switches as shown in Figure 7-2, with both EN signals going to GPIO00 (and both OC signals connected through 100Ω). Will this work?
I’m sorry, I’m a bit confused. Even though there are multiple USB interfaces available, if you want to use multiple USB jacks you must only use one of the interfaces, which should talk to a USB HUB? Is that correct?
What was the purpose of including multiple USB interfaces if they can’t all be connected to jacks?
To answer your power sequencing question…you can power it at the same time, when the driver is ready it will go out and look for the USB Drive if it is connected to the SoC directly so the enable signal to the load switch is controlled by the USB Driver, the VBUS EN pin, but the VDD_5V_IN should be powered before the the stage where USB Driver is loaded.
