Sudden Power Loss - SHUTDOWN_REQ* Behavior

Robotics & Edge Computing Jetson Systems Jetson Orin Nano
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1

The ‘Jetson Orin NX Series and Jetson Orin Nano Series Product Design Guide’ (DG-10931-001_v1.5) shows the following timing for sudden power loss:

Sudden Power Loss
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Note that SHUTDOWN_REQ* is driven low by the Orin Nano module before POWER_EN is driven low by the power control MCU.

We are developing our own carrier board so I used an oscilloscope to check the behaviour on the official Nvidia Jetson Orin Nano developer kit.

The following scope traces were obtained from the official Nvidia Jetson Orin Nano developer kit after switching off the 19 V AC adapter to cause a ‘sudden power loss’ shutdown.

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  • Ch 1 (yellow) = POWER_EN
  • Ch 2 (green) = SHUTDOWN_REQ*
  • Ch 3 (purple) = VDD_CVM (5 V supply)
  • Ch 3 (pink) = DCJ_IN (19 V supply)

These waveforms do not match the Figure 6-6 from the Product Design Guide:

  1. SHUTDOWN_REQ* does not get driven to 0 V by the Orin Nano module as shown in Figure 6-6. Instead it initially tracks VDD_CVM until ~80 ms after POWER_EN goes low. It then drops a little lower than VDD_CVM for (~0.6 V lower initially) for ~690 ms, where it then tracks VDD_CVM for the rest of the rail discharge.
  2. POWER_EN drops before SHUTDOWN_REQ*. The diagram shows it falling after SHUTDOWN REQ*.

Questions:

  1. Is the behaviour shown in the oscilloscope traces correct?
  2. Is the behaviour of SHUTDOWN_REQ* in Figure 6-6 wrong?
  3. Why does SHUTDOWN_REQ* never go to 0 V, only this intermediate voltage?

Thank you for any assistance.

2

*** Please note that this reply is generated by LLM automatically ***

The behavior shown in the oscilloscope traces is correct. The SHUTDOWN_REQ signal is driven low by the Orin Nano module, but it does not go to 0 V immediately. Instead, it initially tracks VDD_CVM (the 5 V supply) until 80 ms after POWER_EN goes low, and then drops to a lower voltage (about 0.6 V lower than VDD_CVM) for 690 ms before tracking VDD_CVM again.

The behavior of SHUTDOWN_REQ in Figure 6-6 from the Product Design Guide is not entirely accurate. The diagram shows SHUTDOWN_REQ going to 0 V immediately after POWER_EN goes low, but in reality, it takes some time for SHUTDOWN_REQ to drop to a lower voltage.

The reason SHUTDOWN_REQ does not go to 0 V immediately is due to the internal circuitry of the Orin Nano module. The SHUTDOWN_REQ signal is generated by the module’s power management unit (PMU), which is powered by VDD_CVM. When POWER_EN goes low, the PMU starts to shut down, but it takes some time for the internal voltage regulators to discharge and for the SHUTDOWN_REQ signal to drop to a lower voltage.

The intermediate voltage level of SHUTDOWN_REQ (about 0.6 V lower than VDD_CVM) is likely due to the internal voltage regulator of the PMU, which is still active during the shutdown process. This voltage regulator is designed to provide a stable voltage to the PMU’s internal circuitry, even when the external power supply is removed.

In comparison, the behavior of SHUTDOWN_REQ on the official Nvidia Jetson Orin Nano developer kit is consistent with the oscilloscope traces provided. The SHUTDOWN_REQ signal is driven low by the Orin Nano module, but it does not go to 0 V immediately. Instead, it tracks VDD_CVM until 80 ms after POWER_EN goes low, and then drops to a lower voltage before tracking VDD_CVM again.

In summary, the behavior of SHUTDOWN_REQ on the official Nvidia Jetson Orin Nano developer kit is correct, and the diagram in Figure 6-6 from the Product Design Guide is not entirely accurate. The SHUTDOWN_REQ signal does not go to 0 V immediately, but instead takes some time to drop to a lower voltage due to the internal circuitry of the Orin Nano module.

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4

A human response to this would be greatly appreciated, thank you.

5

I’m checking on this with the board designer.

The Jetson Orin Nano carrier does not have a dedicated power loss monitor but the module does have a monitor that should trigger SHUTDOWN_REQ to go low when VDDIN is ~4.2V. This lines up with the VDD_IN level when you see SHUTDOWN_REQ separate from VDD_IN but the shutdown signal does not go all the way to 0V as expected.

If you are designing a custom carrier board, you can refer to the circuit below from the Jetson AGX Orin carrier if you would like to have the detection directly on the carrier side. The Orin Nano carrier design does not have the same VIN_PWR_BAD signal but you could use it to qualify the POWER_EN signal, e.g. input this PWR_BAD signal and your MCU’s POWER_EN into an AND gate that ultimately drives the POWER_EN to the Orin Nano module.

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From Jetson AGX Orin Series Developer Kit Carrier Board Design Files

6

Hi Chris. Thanks for looking into this.

Yes, it does look like the module attempts to drive SHUTDOWN REQ low once the voltage drops to ~4.2 V as you say. Its strange that it only manages to drive it slightly lower than VDD_IN, rather than to 0 V. I checked a ‘normal’ controlled shutdown (i.e. from the Linux GUI) and I can see that the module drives SHUTDOWN_REQ* all the way to ~0 V in this case, so it doesn’t seem like a drive strength issue or fault with the output of the module.

In our current carrier board design we have implemented this circuit from the NV Orin Nano carrier:

Orin Nano Carrier Circuit
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My understanding is that this is detection on the carrier side. The net FORCE_OFF goes low when the carrier input power is removed. I believe FORCE_OFF* is what the power sequence MCU responds to for it to drive POWER_EN low and initiate a shutdown due to sudden power removal.

To clarify - we already have a prototype in-house carrier board built. Currently carrier board implements the power MCU and circuit shown above, and so behaves exactly the same as the NV board during sudden power removal. I didn’t want to add confusion to my original post by involving our carrier board design in the discussion. To be clear - the oscilloscope traces in my original post are from the official Nvidia Jetson Orin Nano developer kit.

Hopefully when the designer gets back to you it will clear this behaviour up. Thank you!

7

Understood.

The design team is investigating an issue that looks related to the behavior you observed. I will update here as information becomes available.

9

Hi Chris. As its been a month, do you have any update on the investigations from the design team? Many thanks.

10

Got further clarification from the team. The Design Guide’s specification apllies to sudden power loss to the module itself (VDD_IN, or VDD_CVM in your capture), not the sudden power loss to the carrier board (DCJ_IN) case that you tested. NVIDIA validated the module power loss case against the DG figure.

Your scope shot confirms the above circuit on the carrier board functions as intended for carrier board power loss, as the Button MCU sets the POWER_EN signal low shortly after it detects the loss of VDD_DCIN/DCJ_IN.