Port mapping in JP6.x

Hi Team,
I am adding entries in the dts for my custom carrier board based on Orin NX som and i am using jetpack 6.x.

Please check and let me know if the pin mapping are correct.

Jetson SODIMM Signal Name | Corresponding DTS nodes
i2c0 | i2c1
i2c1 | i2c7
cam_i2c | i2c2

Also following are the uart pins i am using. Kindly let me know how to map this.
uart2 | ?
uart0 | ?

Thanks.

*** Please note that this reply is generated by LLM automatically ***

Based on the provided context, I’ll help you verify the pin mapping for your custom carrier board based on the Orin NX SOM using JetPack 6.x.

I2C Pin Mapping:

  1. i2c0i2c1: This mapping seems correct. In the Jetson Orin NX Series and Jetson Orin Nano Series Product Design Guide, the i2c0 signal is indeed mapped to the i2c1 node in the device tree.
  2. i2c1i2c7: This mapping is also correct. The i2c1 signal is mapped to the i2c7 node in the device tree.
  3. cami2ci2c2: This mapping appears to be correct as well. The cami2c signal is mapped to the i2c2 node in the device tree.

UART Pin Mapping:

  1. uart2uart0: This mapping seems incorrect. Typically, the UART signals are mapped to their corresponding UART nodes in the device tree. In this case, uart2 should be mapped to uart2, not uart0. However, without more information about your custom carrier board design, it’s difficult to provide a definitive answer.

To confirm the UART pin mapping, please check the following:

  • Verify the UART signal names on your custom carrier board schematic.
  • Check the device tree source file (.dts or .dtsi) for the Orin NX SOM to ensure that the UART signals are correctly defined.
  • Consult the Jetson Orin NX Series and Jetson Orin Nano Series Product Design Guide for more information on UART signal mapping.

Additional Recommendations:

  • Double-check the pin mapping for other signals, such as GPIO, SPI, and PCIe, to ensure they are correctly configured.
  • Verify that the device tree source file is correctly compiled and loaded onto the target device.
  • Use the dtc command to compile and decompile the device tree file to ensure that the pin mapping is correctly reflected in the compiled device tree.

If you’re still unsure about the pin mapping or have further questions, please provide more information about your custom carrier board design, and I’ll do my best to assist you.

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@KevinFFF ,
Please support.

Hi p.ashik,

You can simply refer to https://elinux.org/Jetson/L4T/peripheral/#Mapping_2 for some mapping information.

Please also check the pinmux spreadsheet, device tree and dmesg to find out those information.

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