IDEA is a symmetric block cipher with a 128-bit key proposed to replace DES where a strong encryp... more IDEA is a symmetric block cipher with a 128-bit key proposed to replace DES where a strong encryption is required. Many applications need speed of a hardware encryption implementation while trying to preserve flexibility and low cost of a software implementation. In this paper we have presented one solution of this problem. Our system architecture uses a single core module named Round to implement the IDEA algorithm. Using the core we were able to implement and test an example application in only three days. This “off the shelf” solution for designing a cryptographic application using the IDEA algorithm significantly reduced the design cycle, thus greatly reducing time-to-marker and cost of such designs. By increasing the number of the Round modules, a system designer can linearly increase the speed of the design. This system design methodology makes it possible to achieve the necessary performance, or to preserve area (and reduce costs) when needed unlike other known approaches. We have implemented one Round UNICORN architecture in Xilinx FPGA. After implementation the chip has been tested using the standard test vectors and it was capable of performing 2.8 Mbps encryption in both ECB and CBC mode
MPEG-4 AAC audio encoder is developed. AAC main and AAC Low Complexity object types, defined as p... more MPEG-4 AAC audio encoder is developed. AAC main and AAC Low Complexity object types, defined as part of Main profile in General Audio part of ISO/IEC 14496-3 (MPEG-4) standard, are implemented. Encoder targets high-quality, wideband, complex audio. Encoder was carefully designed to respect present accomplishments in audio coding (standardized in MPEG-4). At the same time, several implementation novelties were introduced. Encoder achieves 'perceptible but not annoying' 44.1 kHz audio quality at bitrate 64 kb/s/ch, while satisfying quality is accomplished at 48 kb/s/ch.
... This property is cleverly e.uploited in lossless image compression where, prior to rhe statis... more ... This property is cleverly e.uploited in lossless image compression where, prior to rhe statistical modeling and entropy coding step, predicrive ... Mario Kovai: University of Zagreb, Faculty of Electrical Engineering and Computing, Unska 3 /XI, HR-I 0000 Zagreb, Croatia mario. ...
ABSTRACT Entropy coding algorithms assign variable length codes to the input data (symbols) based... more ABSTRACT Entropy coding algorithms assign variable length codes to the input data (symbols) based on their statistical properties. Those techniques are used in both lossless and lossy compression systems. This article presents scaling and residual mapping parameters in coding schemes and their effect on compression of images. In our experiments these entropy coding techniques have been incorporated in simple DPCM based lossless compressor.
The purpose of this paper is to describe implementation of the system for secure data transfer in... more The purpose of this paper is to describe implementation of the system for secure data transfer in telemedicine based on a public key infrastructure. Data security plays a very important role in telemedicine and it is essential to have security issues in mind when designing such a system. System is based on some well known encryption principles, but it also contains new algorithms for medical images compression and it is used in the real medical environment.
Summary form only given. In the paper we propose a new adaptive predictor which is based on the b... more Summary form only given. In the paper we propose a new adaptive predictor which is based on the blending of multiple static predictors on the dynamically classified causal set of neighboring pixels. The predictor models the image properties around the current, unknown pixel and adjusts itself to the local image region. The main contribution of this work is the enhancement of the well known approach of predictor blends through highly adaptive determination of blending context on a pixel-by-pixel basis using classification technique. This allows modeling of more complex image structures such as nontrivially oriented edges and the periodicity and coarseness of textures.
Future multimedia high-quality systems will be, among all, based on improving 3D visual experienc... more Future multimedia high-quality systems will be, among all, based on improving 3D visual experience. To raise 3D visual content quality and interactivity it is necessary to enable segmentation and classification of content which involves dividing the scene into meaningful sub-regions with the same attributes. Partitioning the image into grouping objects has various different applications in a wide variety of areas, since distinctive features in raw images may appear unclear to the human eyes. Segmentation can be defined as the identification of meaningful image components. It is a fundamental task in image processing providing the basis for any kind of further high-level image analysis. There are many different ways of segmenting the 3D image, all of which can be considered as a good segmentations, depending on objects of interest on an image, and to a large extent, the user’s own subjectivity. Key issues in this chapter include different techniques for segmentation of 3D object based on classification on different regions and shapes.
In this paper we propose a new adaptive prediction scheme based on the blending of multiple stati... more In this paper we propose a new adaptive prediction scheme based on the blending of multiple static predictors on a dynamically classified causal context of neighboring pixels. The idea of predictor blends is further expanded through the determination of blending context that changes its shape on a pixel-by-pixel basis using a simple classification technique, thus allowing the modeling of more complex image structures such as nontrivially oriented edges, the periodicity and the coarseness of textures. Typical natural images are characterized as being composed of image regions with different local properties. Proposed predictor estimates those properties around the currently unknown pixel and adjusts itself so that the presence of detected properties affects the way final prediction is made
The paper describes a new approach to processor construction, which combines a general purpose pr... more The paper describes a new approach to processor construction, which combines a general purpose processor and a program reconfigurable device, as well as its implementation in digital signal processing applications. Significant flexibility and adaptability of such a processor is obtained through the possibility of varying the components of the processor architecture. A simple change of architecture enables easy adaptation to various applications in which such processors are used. Furthermore, to achieve even greater functionality, a dynamic adjustment of the processor is enabled, by enabling the change of function of individual processor components without the need to turn the processor off. The functionality change itself is conducted in such a way that it is made in a single clock, which allows for a great flexibility of the processor, increases the functionality and enables simple implementation in various applications. Such processor architecture is broadly used in embedded computer systems for various multimedia, encryption and digital signal applications.
In this paper, we describe a fully pipelined single chip VU1 ar-chitecture for implementing the J... more In this paper, we describe a fully pipelined single chip VU1 ar-chitecture for implementing the JPEG baseline image compression standard. The architecture exploits the principles of pipelining and parallelism to the maximum extent in order to obtain high speed and throughput. The ...
In this paper, we describe the design and implementation of a prototype single chip VLSI architec... more In this paper, we describe the design and implementation of a prototype single chip VLSI architecture for implementing the JPEG baseline image compression standard. The chip exploits the principles of pipelining and parallelism to the maximum extent in order to obtain high speed and throughput. The architecture for discrete cosine transform and the entropy encoder are based on efficient algorithms
ABSTRACT Finite or Galois fields are used in numerous applications like error correcting codes, d... more ABSTRACT Finite or Galois fields are used in numerous applications like error correcting codes, digital signal processing and cryptography. The design of efficient methods for Galois field arithmetic such as multiplication and division is critical for these applications. The paper presents a new algorithm for computing multiplication and division in GF(2m). A systolic architecture is described for implementing the algorithm which can produce a new result every clock cycle. The architecture can be realized as a VLSI chip that can yield a computational rate of 40 million multiplications/divisions per second
In this paper, we present a new VLSI chip for computing multiplication and division in Galois Fie... more In this paper, we present a new VLSI chip for computing multiplication and division in Galois Fields GF(2m), for values of m 1. 8. The chip is based on a syslolic architecture which can produce a new result every clock cycle and the two operations can be interleaved. A prototype CMOS VLSI chip was designed, fabricated and tested. The chip was tested to be fully functional at 33.3 MHz.
IEEE Transactions on Very Large Scale Integration Systems, 1993
... and Division Algorithm Mario Kovac, Member, IEEE, N. Ranganathan, Senior Member, IEEE, and Mu... more ... and Division Algorithm Mario Kovac, Member, IEEE, N. Ranganathan, Senior Member, IEEE, and Murali Varanasi, Senior Member, IEEE ... Wang et al. [6] proposed a set of architectures for im-plementing the Massey-Omura multiplication algorithm. ...
IDEA is a symmetric block cipher with a 128-bit key proposed to replace DES where a strong encryp... more IDEA is a symmetric block cipher with a 128-bit key proposed to replace DES where a strong encryption is required. Many applications need speed of a hardware encryption implementation while trying to preserve flexibility and low cost of a software implementation. In this paper we have presented one solution of this problem. Our system architecture uses a single core module named Round to implement the IDEA algorithm. Using the core we were able to implement and test an example application in only three days. This “off the shelf” solution for designing a cryptographic application using the IDEA algorithm significantly reduced the design cycle, thus greatly reducing time-to-marker and cost of such designs. By increasing the number of the Round modules, a system designer can linearly increase the speed of the design. This system design methodology makes it possible to achieve the necessary performance, or to preserve area (and reduce costs) when needed unlike other known approaches. We have implemented one Round UNICORN architecture in Xilinx FPGA. After implementation the chip has been tested using the standard test vectors and it was capable of performing 2.8 Mbps encryption in both ECB and CBC mode
MPEG-4 AAC audio encoder is developed. AAC main and AAC Low Complexity object types, defined as p... more MPEG-4 AAC audio encoder is developed. AAC main and AAC Low Complexity object types, defined as part of Main profile in General Audio part of ISO/IEC 14496-3 (MPEG-4) standard, are implemented. Encoder targets high-quality, wideband, complex audio. Encoder was carefully designed to respect present accomplishments in audio coding (standardized in MPEG-4). At the same time, several implementation novelties were introduced. Encoder achieves 'perceptible but not annoying' 44.1 kHz audio quality at bitrate 64 kb/s/ch, while satisfying quality is accomplished at 48 kb/s/ch.
... This property is cleverly e.uploited in lossless image compression where, prior to rhe statis... more ... This property is cleverly e.uploited in lossless image compression where, prior to rhe statistical modeling and entropy coding step, predicrive ... Mario Kovai: University of Zagreb, Faculty of Electrical Engineering and Computing, Unska 3 /XI, HR-I 0000 Zagreb, Croatia mario. ...
ABSTRACT Entropy coding algorithms assign variable length codes to the input data (symbols) based... more ABSTRACT Entropy coding algorithms assign variable length codes to the input data (symbols) based on their statistical properties. Those techniques are used in both lossless and lossy compression systems. This article presents scaling and residual mapping parameters in coding schemes and their effect on compression of images. In our experiments these entropy coding techniques have been incorporated in simple DPCM based lossless compressor.
The purpose of this paper is to describe implementation of the system for secure data transfer in... more The purpose of this paper is to describe implementation of the system for secure data transfer in telemedicine based on a public key infrastructure. Data security plays a very important role in telemedicine and it is essential to have security issues in mind when designing such a system. System is based on some well known encryption principles, but it also contains new algorithms for medical images compression and it is used in the real medical environment.
Summary form only given. In the paper we propose a new adaptive predictor which is based on the b... more Summary form only given. In the paper we propose a new adaptive predictor which is based on the blending of multiple static predictors on the dynamically classified causal set of neighboring pixels. The predictor models the image properties around the current, unknown pixel and adjusts itself to the local image region. The main contribution of this work is the enhancement of the well known approach of predictor blends through highly adaptive determination of blending context on a pixel-by-pixel basis using classification technique. This allows modeling of more complex image structures such as nontrivially oriented edges and the periodicity and coarseness of textures.
Future multimedia high-quality systems will be, among all, based on improving 3D visual experienc... more Future multimedia high-quality systems will be, among all, based on improving 3D visual experience. To raise 3D visual content quality and interactivity it is necessary to enable segmentation and classification of content which involves dividing the scene into meaningful sub-regions with the same attributes. Partitioning the image into grouping objects has various different applications in a wide variety of areas, since distinctive features in raw images may appear unclear to the human eyes. Segmentation can be defined as the identification of meaningful image components. It is a fundamental task in image processing providing the basis for any kind of further high-level image analysis. There are many different ways of segmenting the 3D image, all of which can be considered as a good segmentations, depending on objects of interest on an image, and to a large extent, the user’s own subjectivity. Key issues in this chapter include different techniques for segmentation of 3D object based on classification on different regions and shapes.
In this paper we propose a new adaptive prediction scheme based on the blending of multiple stati... more In this paper we propose a new adaptive prediction scheme based on the blending of multiple static predictors on a dynamically classified causal context of neighboring pixels. The idea of predictor blends is further expanded through the determination of blending context that changes its shape on a pixel-by-pixel basis using a simple classification technique, thus allowing the modeling of more complex image structures such as nontrivially oriented edges, the periodicity and the coarseness of textures. Typical natural images are characterized as being composed of image regions with different local properties. Proposed predictor estimates those properties around the currently unknown pixel and adjusts itself so that the presence of detected properties affects the way final prediction is made
The paper describes a new approach to processor construction, which combines a general purpose pr... more The paper describes a new approach to processor construction, which combines a general purpose processor and a program reconfigurable device, as well as its implementation in digital signal processing applications. Significant flexibility and adaptability of such a processor is obtained through the possibility of varying the components of the processor architecture. A simple change of architecture enables easy adaptation to various applications in which such processors are used. Furthermore, to achieve even greater functionality, a dynamic adjustment of the processor is enabled, by enabling the change of function of individual processor components without the need to turn the processor off. The functionality change itself is conducted in such a way that it is made in a single clock, which allows for a great flexibility of the processor, increases the functionality and enables simple implementation in various applications. Such processor architecture is broadly used in embedded computer systems for various multimedia, encryption and digital signal applications.
In this paper, we describe a fully pipelined single chip VU1 ar-chitecture for implementing the J... more In this paper, we describe a fully pipelined single chip VU1 ar-chitecture for implementing the JPEG baseline image compression standard. The architecture exploits the principles of pipelining and parallelism to the maximum extent in order to obtain high speed and throughput. The ...
In this paper, we describe the design and implementation of a prototype single chip VLSI architec... more In this paper, we describe the design and implementation of a prototype single chip VLSI architecture for implementing the JPEG baseline image compression standard. The chip exploits the principles of pipelining and parallelism to the maximum extent in order to obtain high speed and throughput. The architecture for discrete cosine transform and the entropy encoder are based on efficient algorithms
ABSTRACT Finite or Galois fields are used in numerous applications like error correcting codes, d... more ABSTRACT Finite or Galois fields are used in numerous applications like error correcting codes, digital signal processing and cryptography. The design of efficient methods for Galois field arithmetic such as multiplication and division is critical for these applications. The paper presents a new algorithm for computing multiplication and division in GF(2m). A systolic architecture is described for implementing the algorithm which can produce a new result every clock cycle. The architecture can be realized as a VLSI chip that can yield a computational rate of 40 million multiplications/divisions per second
In this paper, we present a new VLSI chip for computing multiplication and division in Galois Fie... more In this paper, we present a new VLSI chip for computing multiplication and division in Galois Fields GF(2m), for values of m 1. 8. The chip is based on a syslolic architecture which can produce a new result every clock cycle and the two operations can be interleaved. A prototype CMOS VLSI chip was designed, fabricated and tested. The chip was tested to be fully functional at 33.3 MHz.
IEEE Transactions on Very Large Scale Integration Systems, 1993
... and Division Algorithm Mario Kovac, Member, IEEE, N. Ranganathan, Senior Member, IEEE, and Mu... more ... and Division Algorithm Mario Kovac, Member, IEEE, N. Ranganathan, Senior Member, IEEE, and Murali Varanasi, Senior Member, IEEE ... Wang et al. [6] proposed a set of architectures for im-plementing the Massey-Omura multiplication algorithm. ...
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