Tema 2: Lenguaje Ensamblador
Microprocesadores y microcontroladores Dr. José de Jesús Moreno Vázquez
2.1. Programación en lenguaje ensamblador.
Microcontrolador AT89C52
Features
• Compatible with MCS-51™ Products
• 4.0V to 5.5V Operating Range
• 8K Bytes of In-System Reprogrammable Flash Memory– Endurance: 10,000 Write/Erase Cycles
• Fully Static Operation: 0 Hz to 33 MHz
• Three-Level Program Memory Lock
• 128 x 8-Bit Internal RAM
• 32 Programmable I/O Lines
• three 16-Bit Timer/Counters
• Eight Interrupt Sources
• Programmable Serial Channel
• Low Power Idle and Power Down Modes
40-lead PDIP
44-lead PLCC
44-lead TQFP
Microprocesadores y microcontroladores Dr. José de Jesús Moreno Vázquez
Microcontroladores Flash
AT89C5131_USB
AT83C5112_ADC
Microprocesadores y microcontroladores Dr. José de Jesús Moreno Vázquez
Habilitación de la memoria interna y externa
depende del estado lógico del pin EA
Microcontroller
AT89S52
(8K)
Microprocesadores y microcontroladores Dr. José de Jesús Moreno Vázquez
Uso del los buses para direccionamiento externo
Microprocesadores y microcontroladores Dr. José de Jesús Moreno Vázquez
Programación del microcontrolador
Microprocesadores y microcontroladores Dr. José de Jesús Moreno Vázquez
Distribución de la memoria interna RAM
Registro de estado PSW (Program Status Word)
RS1 RS2 Space in RAM
0 0 Bank0 00h-07h
0 1 Bank1 08h-0Fh
1 0 Bank2 10h-17h
1 1 Bank3 18h-1Fh
Vectores de
Interrupción
Microprocesadores y microcontroladores Dr. José de Jesús Moreno Vázquez
Registro puntero de datos
El DPTR no es un registro real, físicamente no existe, este consiste de dos
registros separados: DPH (Data Pointer High) y DPH (Data Pointer Low) por lo que
tenemos un registro de 16 bits o dos de 8 bits.
• Los 16 bits son principalmente empleados para el direccionamiento externo
Registro de entrada/salida (P0, P1, P2, P3)
Microprocesadores y microcontroladores Dr. José de Jesús Moreno Vázquez
Modos de direccionamiento
Direccionamiento directo Direccionamiento indexado
ADD A,7FH MOVC A,@A + DPTR
MOV A,2EH MOVC A,@A + PC
MOV 3DH,4EH
Direccionamiento indirecto Direccionamiento por registro
ADD A,@R0 ADD A, R7
MOV A,@R0 MOV R4,A
DEC R0
Microprocesadores y microcontroladores Dr. José de Jesús Moreno Vázquez
Conjunto de instrucciones
Arithmetic Instructions Branch Instructions
Mnemonic Description Byte Cycle Mnemonic Description Byte Cycle
ADD A,Rn Adds the register to the accumulator 1 1 ACALL addr11 Absolute subroutine call 2 6
ADD A,direct Adds the direct byte to the accumulator 2 2
LCALL addr16 Long subroutine call 3 6
ADD A,@Ri Adds the indirect RAM to the accumulator 1 2
RET Returns from subroutine 1 4
ADD A,#data Adds the immediate data to the accumulator 2 2
RETI Returns from interrupt subroutine 1 4
ADDC A,Rn Adds the register to the accumulator with a carry flag 1 1
AJMP addr11 Absolute jump 2 3
ADDC A,direct Adds the direct byte to the accumulator with a carry flag 2 2
ADDC A,@Ri Adds the indirect RAM to the accumulator with a carry flag 1 2 LJMP addr16 Long jump 3 4
Short jump (from –128 to +127 locations relative to the
ADDC A,#data Adds the immediate data to the accumulator with a carry flag 2 2 SJMP rel 2 3
following instruction)
SUBB A,Rn Subtracts the register from the accumulator with a borrow 1 1 JC rel Jump if carry flag is set. Short jump. 2 3
SUBB A,direct Subtracts the direct byte from the accumulator with a borrow 2 2
JNC rel Jump if carry flag is not set. Short jump. 2 3
SUBB A,@Ri Subtracts the indirect RAM from the accumulator with a borrow 1 2
JB bit,rel Jump if direct bit is set. Short jump. 3 4
SUBB A,#data Subtracts the immediate data from the accumulator with a borrow 2 2
JBC bit,rel Jump if direct bit is set and clears bit. Short jump. 3 4
INC A Increments the accumulator by 1 1 1
JMP @A+DPTR Jump indirect relative to the DPTR 1 2
INC Rn Increments the register by 1 1 2
INC Rx Increments the direct byte by 1 2 3 JZ rel Jump if the accumulator is zero. Short jump. 2 3
INC @Ri Increments the indirect RAM by 1 1 3 JNZ rel Jump if the accumulator is not zero. Short jump. 2 3
DEC A Decrements the accumulator by 1 1 1 Compares direct byte to the accumulator and jumps if not
CJNE A,direct,rel 3 4
equal. Short jump.
DEC Rn Decrements the register by 1 1 1 Compares immediate data to the accumulator and jumps if
CJNE A,#data,rel 3 4
not equal. Short jump.
DEC Rx Decrements the direct byte by 1 1 2 Compares immediate data to the register and jumps if not
CJNE Rn,#data,rel 3 4
equal. Short jump.
DEC @Ri Decrements the indirect RAM by 1 2 3
Compares immediate data to indirect register and jumps if
CJNE @Ri,#data,rel 3 4
INC DPTR Increments the Data Pointer by 1 1 3 not equal. Short jump.
DJNZ Rn,rel Decrements register and jumps if not 0. Short jump. 2 3
MUL AB Multiplies A and B 1 5
DIV AB Divides A by B 1 5 DJNZ Rx,rel Decrements direct byte and jump if not 0. Short jump. 3 4
DA A Decimal adjustment of the accumulator according to BCD code 1 1 NOP No operation 1 1
Microprocesadores y microcontroladores Dr. José de Jesús Moreno Vázquez
Conjunto de instrucciones
Data Transfer Instructions Logic Instructions
Mnemonic Description Byte Cycle Mnemonic Description Byte Cycle
MOV A,Rn Moves the register to the accumulator 1 1
ANL A,Rn AND register to accumulator 1 1
MOV A,direct Moves the direct byte to the accumulator 2 2
MOV A,@Ri Moves the indirect RAM to the accumulator 1 2 ANL A,direct AND direct byte to accumulator 2 2
MOV A,#data Moves the immediate data to the accumulator 2 2
MOV Rn,A Moves the accumulator to the register 1 2 ANL A,@Ri AND indirect RAM to accumulator 1 2
MOV Rn,direct Moves the direct byte to the register 2 4 ANL A,#data AND immediate data to accumulator 2 2
MOV Rn,#data Moves the immediate data to the register 2 2
ANL direct,A AND accumulator to direct byte 2 3
MOV direct,A Moves the accumulator to the direct byte 2 3
MOV direct,Rn Moves the register to the direct byte 2 3 ANL direct,#data AND immediae data to direct register 3 4
MOV direct,direct Moves the direct byte to the direct byte 3 4
ORL A,Rn OR register to accumulator 1 1
MOV direct,@Ri Moves the indirect RAM to the direct byte 2 4
ORL A,direct OR direct byte to accumulator 2 2
MOV direct,#data Moves the immediate data to the direct byte 3 3
MOV @Ri,A Moves the accumulator to the indirect RAM 1 3 ORL A,@Ri OR indirect RAM to accumulator 1 2
MOV @Ri,direct Moves the direct byte to the indirect RAM 2 5 ORL direct,A OR accumulator to direct byte 2 3
MOV @Ri,#data Moves the immediate data to the indirect RAM 2 3
ORL direct,#data OR immediate data to direct byte 3 4
MOV DPTR,#data Moves a 16-bit data to the data pointer 3 3
Moves the code byte relative to the DPTR to the XRL A,Rn Exclusive OR register to accumulator 1 1
MOVC A,@A+DPTR 1 3
accumulator (address=A+DPTR)
XRL A,direct Exclusive OR direct byte to accumulator 2 2
Moves the code byte relative to the PC to the
MOVC A,@A+PC 1 3
accumulator (address=A+PC) XRL A,@Ri Exclusive OR indirect RAM to accumulator 1 2
Moves the external RAM (8-bit address) to the
MOVX A,@Ri 1 3-10 XRL A,#data Exclusive OR immediate data to accumulator 2 2
accumulator
Moves the external RAM (16-bit address) to the XRL direct,A Exclusive OR accumulator to direct byte 2 3
MOVX A,@DPTR 1 3-10
accumulator
Moves the accumulator to the external RAM (8-bit
MOVX @Ri,A 1 4-11 XORL direct,#data Exclusive OR immediate data to direct byte 3 4
address)
Moves the accumulator to the external RAM (16-bit CLR A Clears the accumulator 1 1
MOVX @DPTR,A 1 4-11
address)
CPL A Complements the accumulator (1=0, 0=1) 1 1
PUSH direct Pushes the direct byte onto the stack 2 4
POP direct Pops the direct byte from the stack/td> 2 3 SWAP A Swaps nibbles within the accumulator 1 1
XCH A,Rn Exchanges the register with the accumulator 1 2 RL A Rotates bits in the accumulator left 1 1
XCH A,direct Exchanges the direct byte with the accumulator 2 3 RLC A Rotates bits in the accumulator left through carry 1 1
XCH A,@Ri Exchanges the indirect RAM with the accumulator 1 3
RR A Rotates bits in the accumulator right 1 1
Exchanges the low-order nibble indirect RAM with the
XCHD A,@Ri 1 3 RRC A Rotates bits in the accumulator right through carry 1 1
accumulator
Microprocesadores y microcontroladores Dr. José de Jesús Moreno Vázquez
Conjunto de instrucciones
Bit-oriented Instructions
Mnemonic Description Byte Cycle
CLR C Clears the carry flag 1 1
CLR bit Clears the direct bit 2 3
SETB C Sets the carry flag 1 1
SETB bit Sets the direct bit 2 3
CPL C Complements the carry flag 1 1
CPL bit Complements the direct bit 2 3
ANL C,bit AND direct bit to the carry flag 2 2
ANL C,/bit AND complements of direct bit to the carry flag 2 2
ORL C,bit OR direct bit to the carry flag 2 2
ORL C,/bit OR complements of direct bit to the carry flag 2 2
MOV C,bit Moves the direct bit to the carry flag 2 2
MOV bit,C Moves the carry flag to the direct bit 2 3
Microprocesadores y microcontroladores Dr. José de Jesús Moreno Vázquez
REALICE UN DECODIFICADOR DE 7 SEGMENTOS
INICIO: MOV A,P3
ANL A,#0FH
CJNE A,#00H,UNO
a MOV P1,#7EH
a JMP INICIO
b UNO: CJNE A,#01H,DOS
w0
c f b MOV P1,#30H
w1 JMP INICIO
d DOS: CJNE A,#02H,TRES
w2 g
e e c MOV P1,#6DH
w3 JMP INICIO
f d TRES: CJNE A,#03H,CUATRO
g MOV P1,#79H
JMP INICIO
CUATRO: CJNE A,#04H,CINCO
w3 w2 w1 w0 abcdefg MOV P1,#33H
JMP INICIO
0 0 0 0 1111110 CINCO: CJNE A,#05H,SEIS
0 0 0 1 0110000 MOV P1,#5BH
0 0 1 0 1101101 JMP INICIO
SEIS: CJNE A,#06H,SIETE
0 0 1 1 1111001 MOV P1,#5FH
0 1 0 0 0110011 JMP INICIO
0 1 0 1 1011011 SIETE: CJNE A,#07H,OCHO
MOV P1,#70H
0 1 1 0 1011111 JMP INICIO
0 1 1 1 1110000 OCHO: CJNE A,#08H,NUEVE
1 0 0 0 1111111 MOV P1,#7FH
JMP INICIO
1 0 0 1 1111011 NUEVE: CJNE A,#09,INICIO
MOV P1,#7BH
JMP INICIO
END
Microprocesadores y microcontroladores Dr. José de Jesús Moreno Vázquez
LECTURA DE TABLAS EN MEMORIA DE PROGRAMAS
MOV DPTR,#DATO
MEMORIA DE PROGRAMA
CALL TABLA
2000H L JMP FIN
TABLA: MOV R1,#10H
2001H I MOV R2,#00H
2002H B MOV R3,#08
PROX: MOV A,R2
2003H E
MOVC A, @A+DPTR
2004H R MOV @R1,A
INC R1
2005H A INC R2
2006H
D DJNZ R3,PROX
RET
2007H O DATO: DB ‘LIBERADO’
FIN: END
Microprocesadores y microcontroladores Dr. José de Jesús Moreno Vázquez
LECTURA DE TABLAS EN MEMORIA DE PROGRAMAS
MOV DPTR,#DATO
MEMORIA DE PROGRAMA
CALL TABLA
2000H 48H JMP FIN
2001H 4FH TABLA: MOV R1,#10H
MOV R2,#00H
2002H 4CH
PROX: MOV A,R2
2003H 41H MOVC A,@A+DPTR
MOV @R1,A
2004H 00H
INC R1
INC R2
JNZ PROX
RET
DATO: DB 48H, 4FH, 4CH, 41H, 00H
FIN: END
Microprocesadores y microcontroladores Dr. José de Jesús Moreno Vázquez
