;
; 8bits_display.asm
;
; Created: 2/6/2018 18:25:07
; Author : georg
;
; Replace with your application code
.def tempo=r16
.def aux1=r5
.def drem8u = r22 ; remainder
//.def dres8u = r16 ; result
.def dd8u = r20 ; dividend
.def dv8u = r17 ; divisor
.def dcnt8u = r18 ; loop counter
.def drem16uL=r14
.def drem16uH=r15
;.def dres16uL=r16
.;def dres16uH=r17
.def dd16uL =r0
.def dd16uH =r1
.def dv16uH =r24
.def dcnt16u =r25
.def aux=r23
;***** code
.dseg
.cseg
.org 0x00
ldi tempo, 0
out ddra, tempo
out ddrb, tempo
com tempo
out porta, tempo
out portb, tempo
ldi tempo, 0b01111111
out ddrc, tempo
com tempo
out portc, tempo
ldi tempo, 0b11111111
out ddrd, tempo
in tempo, mcucr
andi tempo, 0b11101111
out mcucr, tempo
programa:
in tempo, pina
mov dd8u, tempo
in tempo, pinb
mov dv8u, tempo
div8u:
sub drem8u,drem8u ; clear remainder and carry
ldi dcnt8u,9 ; init loop counter
d8u_1:
rol dd8u ; shift left dividend
dec dcnt8u ; decrement counter
brne d8u_2 ; if done
rjmp fraccionaria ; return
d8u_2:
rol drem8u ; shift dividend into remainder
sub drem8u,dv8u ; remainder = remainder - divisor
brcc d8u_3 ; if result negative
add drem8u,dv8u ; restore remainder
clc ; clear carry to be shifted into result
rjmp d8u_1 ; else
d8u_3:
sec ; set carry to be shifted into result
rjmp d8u_1
fraccionaria:
ldi tempo, 10
mul drem8u, tempo
ldi aux, 3
div16u: clr drem16uL ;clear remainder Low byte
sub drem16uH,drem16uH;clear remainder High byte and carry
ldi dcnt16u,17 ;init loop counter
d16u_1: rol dd16uL ;shift left dividend
rol dd16uH
dec dcnt16u ;decrement counter
brne d16u_2 ;if done
dec aux
cpi aux,2
breq cargar_dato
cpi aux,1
breq cargar_dato1
cpi aux,0
breq cargar_dato2
ret ; return
next:
ldi tempo, 10
mul drem16uL, tempo
rjmp div16u
cargar_dato:
mov r4,r0
rjmp next
cargar_dato1:
mov r3,r0
rjmp next
cargar_dato2:
mov r2,r0
rjmp fraccion
d16u_2: rol drem16uL ;shift dividend into remainder
rol drem16uH
sub drem16uL,dv8u ;remainder = remainder - divisor
sbc drem16uH,dv16uH ;
brcc d16u_3 ;if result negative
add drem16uL,dv8u ; restore remainder
adc drem16uH,dv16uH
clc ; clear carry to be shifted into result
rjmp d16u_1 ;else
d16u_3: sec ; set carry to be shifted into result
rjmp d16u_1
fraccion:
mov tempo, r4
cpi tempo, 2
brcs menor
breq menor
brcc mayor
mayor:
ldi tempo, 10
mul r4, tempo
mov aux, r0
add aux, r3
rjmp num
menor:
ldi tempo, 100
mul r4, tempo
mov aux, r0
mov tempo, r3
cpi tempo, 5
breq menor1
brcs menor1
ldi tempo, 10
mul r4, tempo
mov aux, r0
add aux, r3
rjmp num
menor1:
ldi tempo, 10
mul r3, tempo
add aux, r0
cpi aux, 250
breq suma
add aux, r2
rjmp num
suma:
mov tempo, r2
cpi tempo, 5
brcs menor2
ldi tempo, 0
mul r2, tempo
add aux, r0
rjmp num
menor2:
add aux, r2
rjmp num
num:
in tempo, pinc
andi tempo, 0b10000000
cpi tempo, 0
breq entera
mov tempo, aux
andi tempo, 0b00001111
ldi zh,high(tabla7seg<<1)
ldi zl, low(tabla7seg<<1)
add zl, tempo
clr tempo
adc zh, tempo
lpm tempo, z
com tempo
ori tempo, 0b10000000
out portc, tempo
mov tempo, aux
andi tempo, 0b11110000
swap tempo
ldi zh,high(tabla7seg<<1)
ldi zl, low(tabla7seg<<1)
add zl, tempo
clr tempo
adc zh, tempo
lpm tempo, z
com tempo
ori tempo, 0b10000000
out portd, tempo
rjmp programa
entera:
mov tempo, dd8u
andi tempo, 0b00001111
ldi zh,high(tabla7seg<<1)
ldi zl, low(tabla7seg<<1)
add zl, tempo
clr tempo
adc zh, tempo
lpm tempo, z
com tempo
ori tempo, 0b10000000
out portc, tempo
mov tempo, dd8u
andi tempo, 0b11110000
swap tempo
ldi zh,high(tabla7seg<<1)
ldi zl, low(tabla7seg<<1)
add zl, tempo
clr tempo
adc zh, tempo
lpm tempo, z
com tempo
andi tempo, 0b01111111
out portd, tempo
rjmp programa
tabla7seg:
.db 0b10111111, 0b10000110
.db 0b11011011, 0b11001111
.db 0b11100110, 0b11101101
.db 0b11111101, 0b10000111
.db 0b11111111, 0b11101111
.db 0b11110111, 0b11111100
.db 0b10111001, 0b11011110
.db 0b11111001, 0b11110001
EJEMPLO UTILIZADO
PORT A=178
PORT B=11
ENTERO= 16
FRACCION=18
