Ferrite Bead in ADC Power supply
I am using AD5941 in my design. The power section of its analog domain (AVDD) is given below. It is obtained from the reference design. You can see the schematics, BOM etc in bottom of this page.
The LDO used is ADM7155. From LDO the output is connected to a ferrite bead (MPZ1608S601ATA00).
I found an Q&A in ti e2e community which suggests don't use ferrite beads in ADC power supply.
I simulated the AVDD power supply section in LTspice. The response is given below. The output is kind of a square wave.
CIRCUIT:
SIMULATION RESULT
May I know do I really need to place a ferrite bead in my board?
The response I shown is that expected. Why it is pulsating?
In the reference board they used single LDO for AVDD and DVDD. In my board I will be using separate LDO's for AVDD and DVDD, but same P/N.
2 answers
The following users marked this post as Works for me:
| User | Comment | Date |
|---|---|---|
| newbie |
Thread: Works for me Ver good explanation.The author is a good teacher |
Jul 17, 2025 at 18:44 |
I see Nick has already given you a direct answer, so I'll respond to the question and answer you quoted about series ferrite beads.
That answer is technically correct, but it's also misleading because it pretends you will only put a ferrite bead in series, with nothing else done. Of course you wouldn't do that.
You would always have one or more decoupling caps with as small a loop between the IC power and ground pins and the cap as possible. This takes care of supplying the short but sudden current demands the answer refers to. With proper decoupling, a series ferrite bead only needs to supply a more spread out average current, not the actual instantaneous demands of the bare chip.
Nick mentions using a ferrite chip in series with a decoupling cap to reduce the noise on the master supply caused by each chip. That's valid, but I usually use a different tactic.
With proper bypassing at each point of use, the supply noise will be low enough to not cause problems for the digital chips. A few mV or 10s of mV supply noise won't bother most digital chips.
It's the analog chips that need the extra-clean supply. I therefore filter the supply going to them instead of trying to keep every last bit of digital noise from the master supply.
For the analog power input to a micro with 12 bit A/D, I usually use a single chip inductor (about 1 µH and a few 100 mΩ) in series with the supply, followed by about 20 µF to ground. That filters out the little bit of nasty stuff the bypass caps on the digital chips didn't shunt, and is too fast for the linear regulator to regulate away.
For more sensitive analog parts, I often use a separate LDO with one or two stages of chip inductor and capacitor in front of the LDO. Of course each point of use still has a bypass cap that can handle the expected current noise frequencies.
with your L and C approach for AVDD filtering, assuming C is ceramic, have you had bad experience with resonance?
Not that I know of. I have looked at the result with a scope, and the voltage has always been nice and clean.
Keep in mind that these are very small inductors, and they are intended to be lossy. My usual "chip inductor" (surface mount version of what used to be known as a "ferrite bead") is only 950 nH with 600 mΩ series resistance, and that doesn't account for the deliberately lossy ferrite. You wouldn't use one of these if you wanted resonance.
Digital side of the A/D converter injects noise into the digital supply rail. LDOs can regulate out low frequency oscillations. But LDOs don't block high frequency noise very well. Some specially designed LDOs can smooth out ripple from switch mode converters up to 2 MHz. But that's as high as LDOs go.
Ferrite beads block high frequency noise better than LDOs. The ferrite bead along with the decoupling capacitors prevent the noise generated by the digital section of the A/D from leaking through the power supply rails to the analog section of the A/D.
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