{"article":{"@attributes":{"key":"journals\/cssp\/BalasubramanianRGRLYK25","mdate":"2026-04-21"},"author":["Linknath Surya Balasubramanian","Elijah Racz","Anoop Gopinath","Maher E. Rizkalla","John J. Lee 0001","Trond Ytterdal","Mukesh Kumar"],"title":"Design of Area Efficient In-Memory Adder and Sum-Comparator with a Variable Reference Voltage Mechanism.","pages":"5343-5356","year":"2025","month":"July","volume":"44","journal":"Circuits Syst. Signal Process.","number":"7","ee":"https:\/\/doi.org\/10.1007\/s00034-025-03033-9","url":"db\/journals\/cssp\/cssp44.html#BalasubramanianRGRLYK25","stream":"streams\/journals\/cssp"}}