default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDXuan Guo 0003
Person information
- affiliation: Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China
Other persons with the same name
- Xuan Guo — disambiguation page
- Xuan Guo 0001
![[0000-0002-1972-7889]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0002-1972-7889")
— Beijing Normal University, Beijing, China - Xuan Guo 0002 — Zhengzhou University, Zhengzhou, China
- Xuan Guo 0004 — University of North Texas, Denton, TX, USA
- Xuan Guo 0005 — Tianjin University, Tianjin, China
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2026
[j27]Fangyuan Xu, Yina Shangguan, Xuan Guo, Hanbo Jia, Yun Bai, Kai Sun, Xinyu Liu:
A low-voltage input buffer with linearity-enhancement scheme for a 500MS/s Pipelined-SAR ADC achieving SFDR > 79dBc. Microelectron. J. 167: 106918 (2026)- [j26]Jiahui Luo, Hanbo Jia, Xuan Guo, Linzhen Wu, Yuzhen Zhang, Xiuheng Wu, Kai Sun, Xinyu Liu:
A novel fast and wide range background timing mismatch calibration algorithm for TIADCs. Microelectron. J. 170: 107084 (2026) - 2025
- [j25]Ben He, Xuan Guo, Hanbo Jia, Kai Sun, Xinyu Liu:
A 500MS/s 14-bit Pipelined ADC With Startup Protection Circuit in 40 nm CMOS. IEEE Access 13: 43097-43108 (2025) - [j24]Ben He, Xuan Guo, Hanbo Jia, Kai Sun, Lei Zhou, Zhijie Chen, Xinyu Liu:
A dither-based background calibration circuit for pipelined ADCs in 40 nm CMOS. IEICE Electron. Express 22(5): 20240726 (2025) - [j23]Zeyu Li, Fangyuan Xu, Xuan Guo, Hanbo Jia, Kai Sun, Xinyu Liu:
An input buffer with opamp-based bootstrap circuit and cross-coupled substrate technique for 1.5-GS/s pipelined ADC in 40-nm CMOS process. IEICE Electron. Express 22(10): 20250092 (2025) - [j22]Qing Su, Xuan Guo, Hanbo Jia, Yihan Li, Kai Sun, Xinyu Liu:
A high-speed single channel reconfigurable 1-GS/s to 1.5-GS/s, 8-bit to 6-bit SAR ADC in 28 nm CMOS. IEICE Electron. Express 22(12): 20250220 (2025) - [j21]Jiang Xu, Xuqiang Zheng, Zedong Wang, Hua Xu, Wenxiang Zhen, Xuan Guo, Xinyu Liu:
An 8-bit 1-GHz SAR ADC with charge-sharing sampling and embedded auto-zero comparator for ultra-high-speed wireline systems. IEICE Electron. Express 22(24): 20250544 (2025) - [j20]Hua Xu, Mingche Lai, Xuqiang Zheng, Zedong Wang, Jiang Xu, Sai Li, Fangxu Lv, Min Liu, Weijie Li, Zhanhao Wen, Xuan Guo, Xinhua Wang, Zhi Jin, Xinyu Liu:
A 112-Gb/s PAM-4 Retimer Transceiver With Jitter-Filtering Clocking Scheme and BER Optimization Technique in 28-nm CMOS. IEEE J. Solid State Circuits 60(7): 2305-2318 (2025) - [j19]Ben He, Xuan Guo, Hanbo Jia, Xinyu Liu:
A 100-MHz bandwidth continuous-time sigma-delta ADC with 1 V supply in 28 nm CMOS. Microelectron. J. 158: 106597 (2025) - [j18]Qing Su, Xuan Guo, Hanbo Jia, Heping Ma, Linzhen Wu, Kai Sun, Xinyu Liu:
A 500 MS/s 12b single channel SAR-assisted pipelined ADC with two-stage open-loop dynamic amplifier. Microelectron. J. 160: 106659 (2025) - [j17]Yuzhen Zhang, Xuan Guo, Hanbo Jia, Li Luo, Linzhen Wu, Dandan Wang, Xinyu Liu:
A genetic algorithm-based capacitor mismatch calibration scheme for SAR ADCs. Microelectron. J. 161: 106725 (2025) - [j16]Jiawei Ding, Xuan Guo, Shan Lu, Qing Su, Tao liu, Hanbo Jia, Yihan Li, Xinyu Liu:
A 14-GS/s 8-bit time-interleaved SAR ADC with multi-path bootstrapped switch and low-jitter sampling PLL in 28-nm CMOS. Microelectron. J. 163: 106770 (2025) - [j15]Jingyuan Xu, Kai Sun, Xuan Guo, Wenhao Ren, Fangyuan Xu, Hanbo Jia, Xinyu Liu:
A 1.5 GS/s 13-bit partial-interleaving pipelined-SAR ADC with 1/gm load and current-biased ring amplifier. Microelectron. J. 165: 106859 (2025) - [j14]Xiuheng Wu, Yuzhen Zhang, Xuan Guo, Hanbo Jia, Linzhen Wu, Dandan Wang, Kai Sun, Xinyu Liu:
A 55-nm 10-GS/s 6-b Time-Interleaved SAR ADC With Bandwidth Boosting Techniques. IEEE Trans. Circuits Syst. II Express Briefs 72(11): 1525-1529 (2025) - [j13]Shan Lu, Danyu Wu, Xuan Guo, Hanbo Jia, Yong Chen, Xinyu Liu:
A Quad-Core VCO Incorporating Area-Saving Folded S-Shaped Tail Filtering in 28-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 33(4): 1162-1166 (2025) - [j12]Xing Li, Lei Zhou, Xuan Guo, Hanbo Jia, Danyu Wu, Jin Wu, Xinyu Liu:
A 25-GS/s 8-bit Current-Steering DAC With ADC-Based Duty-Cycle Detection in 40-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 33(5): 1487-1491 (2025) - 2024
- [j11]Huaiyu Zhai, Hanbo Jia, Xuan Guo, Zilin Jiang, Yuzhen Zhang, Dandan Wang, Jin Wu:
An interstage gain calibration technique for pipelined ADCs exploiting complementary dithering and calibration windows detector. IEICE Electron. Express 21(8): 20240121 (2024) - [j10]Zeyu Li, Xuan Guo, Hanbo Jia, Xinyu Liu:
A 1.25-GS/s 14-bit pipelined ADC using a current-feedback flipped input buffer and large dither technique to achieve high linearity. IEICE Electron. Express 21(19): 20240457 (2024) - [j9]Zilin Jiang, Danyu Wu, Xuan Guo, Hanbo Jia, Shuangbao Jia, Heping Ma, Kai Sun, Xinyu Liu:
A wideband front-end with integrated high-voltage assisted input buffer for high-speed ADC. IEICE Electron. Express 21(24): 20240640 (2024) - [j8]Feitong Wu, Hanbo Jia, Xuan Guo, Zilin Jiang, Xinyu Liu:
A 12bit 1.6 GS/s pipelined ADC with multi-level dither injection achieving 68 dB SFDR over PVT. Microelectron. J. 143: 106048 (2024) - [j7]Heng Zhang, Xuan Guo, Ben He, Hanbo Jia, Xinyu Liu:
A 1.25-GS/s 10-bit single-channel ring amplifier-based pipelined ADC in 28-nm CMOS. Microelectron. J. 146: 106160 (2024) - [j6]Xing Li, Lei Zhou, Xuan Guo, Hanbo Jia, Danyu Wu, Jin Wu, Xinyu Liu:
A 16-Bit 5 GS/s DAC With Redundant-MSB-Based Digital Pre-Distortion Achieving SFDR >61 dBc Up to 2.4 GHz in 40-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 71(12): 4829-4833 (2024) - [j5]Shan Lu, Danyu Wu, Xuan Guo, Hanbo Jia, Yong Chen, Xinyu Liu:
A 28-nm Dual-Mode Explicit Class-F₂₃ VCO With Low-Loss CM Return Path Achieving 70-400-kHz 1/f³ PN Corner Over 4.9-7.3-GHz TR. IEEE Trans. Very Large Scale Integr. Syst. 32(9): 1749-1753 (2024) - [c3]Tianle Chen, Hongyu Ren, Zunsong Yang, Yunbo Huang, Xianghe Meng, Weiwei Yan, Weidong Zhang, Xuqiang Zheng, Xuan Guo, Tetsuya Iizuka, Pui-In Mak, Yong Chen, Bo Li:
A 6.5-to-6.9-GHz SSPLL with Configurable Differential Dual-Edge SSPD Achieving 44-fs RMS Jitter, -260.7-dB FOMJitter, and -76.5-dBc Reference Spur. VLSI Technology and Circuits 2024: 1-2 - 2023
- [j4]Heng Zhang, Ben He, Xuan Guo, Danyu Wu, Xinyu Liu:
A 1-GS/s 12-bit Single-Channel Pipelined ADC in 28-nm CMOS With Input-Split Fully Differential Ring Amplifier. IEEE Trans. Very Large Scale Integr. Syst. 31(12): 1931-1938 (2023) - [c2]Da Fu, Danyu Wu, Xuan Guo, Hanbo Jia, Jie Fu, Shan Lu, Xinyu Liu:
A 64Gbps 1.36 Vppd 1.44pJ/b Fully CMOS-Style Transmitter with Active Hybrid Driver in 28nm CMOS. MWSCAS 2023: 541-545
2010 – 2019
- 2019
- [j3]Huasen Liu, DanYu Wu, Lei Zhou, Yinkun Huang, Jian Luan, Xuan Guo, Dong Wang, Xuqiang Zheng, Jin Wu, Xinyu Liu:
A 10-GS/s 8-bit 4-way interleaved folding ADC in 0.18 µm SiGe-BiCMOS. IEICE Electron. Express 16(3): 20181079 (2019) - [j2]Huasen Liu, DanYu Wu, Lei Zhou, Jian Luan, Xuan Guo, Dong Wang, Jin Wu, Xinyu Liu:
A 1 GS/s 12-bit pipelined folding ADC with a novel encoding algorithm. IEICE Electron. Express 16(7): 20181150 (2019) - [j1]Dong Wang, Lei Zhou, DanYu Wu, Chonghe Ma, Jinxin Xue, Xuan Guo, Jian Luan, Huasen Liu, Jin Wu, Xinyu Liu:
An 8 GSps 14 bit RF DAC With IM3<-62 dBc up to 3.6 GHz. IEEE Trans. Circuits Syst. II Express Briefs 66-II(5): 768-772 (2019) - [c1]DanYu Wu, Lei Zhou, Huasen Liu, Yinkun Huang, Jian Luan, Xuan Guo, Jin Wu, Xinyu Liu:
A 10-GS/s 8-bit SiGe ADC with Isolated 4×4 Analog Input Multiplexer. ISCAS 2019: 1-4
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2026-03-06 22:58 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
