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ORCIDWenping Wang 0004
Person information
- affiliation: Vitesse Semiconductor, Austin, TX, USA
- affiliation (PhD 2008): Arizona State University, Department of Electrical Engineering, Tempe, AZ, USA
- affiliation (former): Peking University, Microelectronics Department, Beijing, China
Other persons with the same name
- Wenping Wang (aka: Wen-Ping Wang, Wen Ping Wang) — disambiguation page
- Wenping Wang 0001
![[0000-0002-2284-3952]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0002-2284-3952")
— Texas A&M University, Department of Computer Science and Engineering, TX, USA (and 2 more) - Wenping Wang 0002 — Tianjin Agricultural College, Engineering and Technology College, Tianjin, China
- Wenping Wang 0003 — State Grid Anhui Electric Power Company, Hefei Power Supply Company, China
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2010 – 2019
- 2013
[j7]Shengqi Yang, Wenping Wang, Mark Hagan, Wei Zhang, Pallav Gupta, Yu Cao:
NBTI-aware circuit node criticality computation. ACM J. Emerg. Technol. Comput. Syst. 9(3): 23:1-23:19 (2013)- 2011
- [j6]Yu Wang, Xiaoming Chen, Wenping Wang, Yu Cao, Yuan Xie, Huazhong Yang:
Leakage Power and Circuit Aging Cooptimization by Gate Replacement Techniques. IEEE Trans. Very Large Scale Integr. Syst. 19(4): 615-628 (2011) - 2010
- [j5]Wenping Wang, Shengqi Yang, Sarvesh Bhardwaj, Sarma B. K. Vrudhula, Frank Liu, Yu Cao:
The Impact of NBTI Effect on Combinational Circuit: Modeling, Simulation, and Analysis. IEEE Trans. Very Large Scale Integr. Syst. 18(2): 173-183 (2010)
2000 – 2009
- 2009
- [j4]Yu Cao, Asha Balijepalli, Saurabh Sinha, Chi-Chao Wang, Wenping Wang, Wei Zhao:
The Predictive Technology Model in the Late Silicon Era and Beyond. Found. Trends Electron. Des. Autom. 3(4): 305-401 (2009) - [j3]Michael DeBole, Krishnan Ramakrishnan, Varsha Balakrishnan, Wenping Wang, Hong Luo, Yu Wang, Yuan Xie, Yu Cao, Narayanan Vijaykrishnan:
New-Age: A Negative Bias Temperature Instability-Estimation Framework for Microarchitectural Components. Int. J. Parallel Program. 37(4): 417-431 (2009) - [c13]Michael DeBole, Krishnan Ramakrishnan, Varsha Balakrishnan, Wenping Wang, Hong Luo, Yu Wang, Yuan Xie, Yu Cao, Narayanan Vijaykrishnan:
A framework for estimating NBTI degradation of microarchitectural components. ASP-DAC 2009: 455-460 - [c12]Yu Wang, Xiaoming Chen, Wenping Wang, Yu Cao, Yuan Xie, Huazhong Yang:
Gate replacement techniques for simultaneous leakage and aging optimization. DATE 2009: 328-333 - [c11]Yu Wang, Xiaoming Chen, Wenping Wang, Varsha Balakrishnan, Yu Cao, Yuan Xie, Huazhong Yang:
On the efficacy of input Vector Control to mitigate NBTI effects and leakage power. ISQED 2009: 19-26 - 2008
- [j2]Sarvesh Bhardwaj, Wenping Wang, Rakesh Vattikonda, Yu Cao, Sarma B. K. Vrudhula:
Scalable model for predicting the effect of negative bias temperature instability for reliable design. IET Circuits Devices Syst. 2(4): 361-371 (2008) - [j1]Shengqi Yang, Wenping Wang, Tiehan Lv, Wayne H. Wolf, Narayanan Vijaykrishnan, Yuan Xie:
Case Study of Reliability-Aware and Low-Power Design. IEEE Trans. Very Large Scale Integr. Syst. 16(7): 861-873 (2008) - [c10]Wenping Wang, Vijay Reddy, Bo Yang, Varsha Balakrishnan, Srikanth Krishnan, Yu Cao:
Statistical prediction of circuit aging under process variations. CICC 2008: 13-16 - [c9]Wenping Wang, Shengqi Yang, Yu Cao:
Node Criticality Computation for Circuit Timing Analysis and Optimization under NBTI Effect. ISQED 2008: 763-768 - [c8]Mridul Agarwal, Varsha Balakrishnan, Anshuman Bhuyan, Kyunglok Kim, Bipul C. Paul, Wenping Wang, Bo Yang, Yu Cao, Subhasish Mitra:
Optimized Circuit Failure Prediction for Aging: Practicality and Promise. ITC 2008: 1-10 - 2007
- [c7]Wenping Wang, Vijay Reddy, Anand T. Krishnan, Rakesh Vattikonda, Srikanth Krishnan, Yu Cao:
An Integrated Modeling Paradigm of Circuit Reliability for 65nm CMOS Technology. CICC 2007: 511-514 - [c6]Wenping Wang, Shengqi Yang, Sarvesh Bhardwaj, Rakesh Vattikonda, Sarma B. K. Vrudhula, Frank Liu, Yu Cao:
The Impact of NBTI on the Performance of Combinational and Sequential Circuits. DAC 2007: 364-369 - [c5]Wenping Wang, Zile Wei, Shengqi Yang, Yu Cao:
An efficient method to identify critical gates under circuit aging. ICCAD 2007: 735-740 - 2006
- [c4]Sarvesh Bhardwaj, Wenping Wang, Rakesh Vattikonda, Yu Cao, Sarma B. K. Vrudhula:
Predictive Modeling of the NBTI Effect for Reliable Design. CICC 2006: 189-192 - [c3]Rakesh Vattikonda, Wenping Wang, Yu Cao:
Modeling and minimization of PMOS NBTI effect for robust nanometer design. DAC 2006: 1047-1052 - 2005
- [c2]Shengqi Yang, Wayne H. Wolf, Wenping Wang, Narayanan Vijaykrishnan, Yuan Xie:
Low-leakage robust SRAM cell design for sub-100nm technologies. ASP-DAC 2005: 539-544 - [c1]Shengqi Yang, Wayne H. Wolf, Narayanan Vijaykrishnan, Yuan Xie, Wenping Wang:
Accurate Stacking Effect Macro-Modeling of Leakage Power in Sub-100nm Circuits. VLSI Design 2005: 165-170
Coauthor Index
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