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ORCIDSeung-Hoon Lee 0006
Person information
- affiliation: Sogang University, Department of Electronic Engineering, Korea
Other persons with the same name
- Seunghoon Lee (aka: SeungHoon Lee, Seung-hoon Lee, Seung-Hoon Lee, Seung hoon Lee, Seung Hoon Lee) — disambiguation page
- Seung-Hoon Lee 0001
![[0000-0003-3501-1415]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0003-3501-1415")
— Chungbuk National University, School of Electrical Engineering, Korea - Seung-Hoon Lee 0003 — Inha University, Department of Electrical Engineering, Incheon, Korea
- Seung-Hoon Lee 0005 — University of Illinois at Urbana-Champaign, Department of Electrical and Computer Engineering and Coordinated Science Laboratory, IL, USA
- Seung-Hoon Lee 0007 — University of California, Los Angeles, UCLA, Department of Computer Science, CA, USA
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2020 – today
- 2021
[j23]Jun-Ho Boo, Kang-Il Cho, Ho-Jin Kim, Jae-Geun Lim, Yong-Sik Kwak, Seung-Hoon Lee, Gil-Cho Ahn:
A Single-Trim Switched Capacitor CMOS Bandgap Reference With a 3σ Inaccuracy of +0.02%, -0.12% for Battery-Monitoring Applications. IEEE J. Solid State Circuits 56(4): 1197-1206 (2021)- 2020
- [c25]Kang-Il Cho, Ho-Jin Kim, Jun-Ho Boo, Yong-Sik Kwak, Jun-Sang Park, Seung-Hoon Lee, Gil-Cho Ahn:
A 10-b 900-MS/s Single-Channel Pipelined-SAR ADC Using Current-Mode Reference Scaling. A-SSCC 2020: 1-2 - [c24]Jun-Sang Park, Je-Min Jeon, Jun-Ho Boo, Jae-Hyuk Lee, Kang-Il Cho, Ho-Jin Kim, Gil-Cho Ahn, Seung-Hoon Lee:
A 2.2mW 12-bit 200MS/s 28nm CMOS Pipelined SAR ADC with Dynamic Register-Based High-Speed SAR Logic. A-SSCC 2020: 1-2 - [c23]Jun-Ho Boo, Kang-Il Cho, Ho-Jin Kim, Jae-Geun Lim, Yong-Sik Kwak, Seung-Hoon Lee, Gil-Cho Ahn:
A Single-Trim Switched Capacitor CMOS Bandgap Reference with a 3σ Inaccuracy of +0.02%, -0.12% for Battery Monitoring Applications. VLSI Circuits 2020: 1-2
2010 – 2019
- 2019
- [j22]Jun-Sang Park, Tai-Ji An, Gil-Cho Ahn, Seung-Hoon Lee:
A 12.1 fJ/Conv.-Step 12b 140 MS/s 28-nm CMOS Pipelined SAR ADC Based on Energy-Efficient Switching and Shared Ring Amplifier. IEEE Trans. Circuits Syst. II Express Briefs 66-II(7): 1119-1123 (2019) - [c22]Kang-Il Cho, Yong-Sik Kwak, Ho-Jin Kim, Jun-Ho Boo, Seung-Hoon Lee, Gil-Cho Ahn:
A 10-b 320-MS/s Dual-Residue Pipelined SAR ADC with Binary Search Current Interpolator. CICC 2019: 1-4 - 2018
- [j21]Yong-Sik Kwak, Kang-Il Cho, Ho-Jin Kim, Seung-Hoon Lee, Gil-Cho Ahn:
A 72.9-dB SNDR 20-MHz BW 2-2 Discrete-Time Resolution-Enhanced Sturdy MASH Delta-Sigma Modulator Using Source-Follower-Based Integrators. IEEE J. Solid State Circuits 53(10): 2772-2782 (2018) - [j20]Tai-Ji An, Moon-Sang Hwang, Won-Jun Choe, Gil-Cho Ahn, Seung-Hoon Lee:
Area-Efficient Time-Shared Digital-to-Analog Converter With Dual Sampling for AMOLED Column Driver IC's. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(10): 3227-3240 (2018) - 2017
- [c21]Yong-Sik Kwak, Kang-Il Cho, Ho-Jin Kim, Seung-Hoon Lee, Gil-Cho Ahn:
A 72.9-dB SNDR 20-MHz BW 2-2 discrete-time sturdy MASH delta-sigma modulator using source-follower-based integrators. A-SSCC 2017: 289-292 - 2013
- [j19]Hyo-Jin Kim, Tai-Ji An, Sungmeen Myung, Seung-Hoon Lee:
Time-Interleaved and Circuit-Shared Dual-Channel 10 b 200 MS/s 0.18 µm CMOS Analog-to-Digital Convertor. IEEE Trans. Very Large Scale Integr. Syst. 21(12): 2206-2213 (2013) - [c20]Tai-Ji An, Jun-Sang Park, Yongmin Kim, Suk-Hee Cho, Gil-Cho Ahn, Seung-Hoon Lee:
10b 150MS/s 0.4mm2 45nm CMOS ADC based on process-insensitive amplifiers. ISCAS 2013: 316- - 2012
- [c19]Sang-Pil Nam, Yongmin Kim, Dong-Hyun Hwang, Hyo-Jin Kim, Tai-Ji An, Jun-Sang Park, Suk-Hee Cho, Gil-Cho Ahn, Seung-Hoon Lee:
A 10b 1MS/s-to-10MS/s 0.11um CMOS SAR ADC for analog TV applications. ISOCC 2012: 124-127 - 2011
- [j18]Byeong-Woo Koo, Seung-Jae Park, Gil-Cho Ahn, Seung-Hoon Lee:
A Single Amplifier-Based 12-bit 100 MS/s 1 V 19 mW 0.13 µm CMOS ADC with Various Power and Area Minimized Circuit Techniques. IEICE Trans. Electron. 94-C(8): 1282-1288 (2011) - [j17]Hee-Cheol Choi, Pil-Seon Yoo, Gil-Cho Ahn, Seung-Hoon Lee:
A 14b 150 MS/s 140 mW 2.0 mm2 0.13µm CMOS A/D converter for software-defined radio systems. Int. J. Circuit Theory Appl. 39(2): 135-147 (2011) - [c18]Chang-Seob Shin, Min-Ho Yoon, Kang-Il Cho, Young-Ju Kim, Kwang-Soo Kim, Seung-Hoon Lee, Gil-Cho Ahn:
A 6.25 MHz BW 8-OSR fifth-order single-stage sigma-delta ADC. ISCAS 2011: 1117-1120 - [c17]Dong-Hyun Hwang, Jung-Eun Song, Sang-Pil Nam, Hyo-Jin Kim, Tai-Ji An, Kwang-Soo Kim, Seung-Hoon Lee:
A range-scaled 13b 100MS/s 0.13μm CMOS SHA-free ADC based on a single reference. ISOCC 2011: 62-65 - 2010
- [j16]Young-Ju Kim, Hee-Cheol Choi, Gil-Cho Ahn, Seung-Hoon Lee:
A 12 bit 50 MS/s CMOS Nyquist A/D Converter With a Fully Differential Class-AB Switched Op-Amp. IEEE J. Solid State Circuits 45(3): 620-628 (2010) - [c16]Young-Ju Kim, Kyung-Hoon Lee, Seung-Hak Ji, Yi-Gi Kwon, Seung-Hoon Lee, Kyoung-Jun Moon, Michael Choi, Ho-Jin Park, Byeong-Ha Park:
A 10b 120MS/s 45nm CMOS ADC using A re-configurable three-stage switched op-amp. CICC 2010: 1-4
2000 – 2009
- 2009
- [j15]Young-Ju Kim, Kyung-Hoon Lee, Myung-Hwan Lee, Seung-Hoon Lee:
A 0.31 pJ/Conversion-Step 12-Bit 100 MS/s 0.13 µm CMOS A/D Converter for 3G Communication Systems. IEICE Trans. Electron. 92-C(9): 1194-1200 (2009) - [j14]Hee-Cheol Choi, Young-Ju Kim, Kyung-Hoon Lee, Younglok Kim, Seung-Hoon Lee:
A 10 b 25 MS/s 4.8 mW 0.13 µm CMOS ADC with switched-bias power-reduction techniques. Int. J. Circuit Theory Appl. 37(9): 955-967 (2009) - [j13]Seung-Hoon Lee, Young-Ju Kim, Hee-Cheol Choi, Gil-Cho Ahn:
A 1.2-V 12-b 120-MS/s SHA-Free Dual-Channel Nyquist ADC Based on Midcode Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(5): 894-901 (2009) - [c15]Young-Ju Kim, Hee-Cheol Choi, Kyung-Hoon Lee, Gil-Cho Ahn, Seung-Hoon Lee, Ju-Hwa Kim, Kyoung-Jun Moon, Michael Choi, Kyoung-Ho Moon, Ho-Jin Park, Byeong-Ha Park:
A 9.43-ENOB 160MS/s 1.2V 65nm CMOS ADC based on multi-stage amplifiers. CICC 2009: 271-274 - 2008
- [j12]Young-Ju Kim, Hee-Cheol Choi, Seung-Hoon Lee, Dongil Cho:
A 12 b 200 kS/s 0.52 mA 0.47 mm2 Algorithmic A/D Converter for MEMS Applications. IEICE Trans. Electron. 91-C(2): 206-212 (2008) - [j11]Hee-Cheol Choi, Young-Ju Kim, Si-Wook Yoo, Sun-Young Hwang, Seung-Hoon Lee:
A Programmable 0.8-V 10-bit 60-MS/s 19.2-mW 0.13-mu m CMOS ADC Operating Down to 0.5 V. IEEE Trans. Circuits Syst. II Express Briefs 55-II(4): 319-323 (2008) - [c14]Young-Ju Kim, Hee-Cheol Choi, Pil-Seon Yoo, Dong-Suk Lee, Joong-Ho Choi, Seung-Hoon Lee:
A low offset rail-to-rail 12b 2MS/s 0.18μm CMOS cyclic ADC. APCCAS 2008: 17-20 - [c13]Hee-Cheol Choi, Young-Ju Kim, Se-Won Lee, Jae-Yeol Han, Oh-Bong Kwon, Younglok Kim, Seung-Hoon Lee:
A 52mW 0.56mm2 1.2V 12b 120MS/s SHA-Free dual-channel Nyquist ADC based on mid-code calibration. ISCAS 2008: 9-12 - 2007
- [j10]Young-Ju Kim, Young-Jae Cho, Doo-Hwan Sa, Seung-Hoon Lee:
A 10 b 200 MS/s 1.8 mm2 83 mW 0.13µm CMOS ADC Based on Highly Linear Integrated Capacitors. IEICE Trans. Electron. 90-C(10): 2037-2043 (2007) - [c12]Young-Ju Kim, Hee-Cheol Choi, Si-Wook Yoo, Seung-Hoon Lee, Dae-Young Chung, Kyoung-Ho Moon, Ho-Jin Park, Jae-Whui Kim:
A Re-configurable 0.5V to 1.2V, 10MS/s to 100MS/s, Low-Power 10b 0.13um CMOS Pipeline ADC. CICC 2007: 185-188 - 2006
- [j9]Byoung-Han Min, Young-Jae Cho, Hee-Sung Chae, Hee-Won Park, Seung-Hoon Lee:
A 10b 100 MS/s 1.4 mm256 mW 0.18 µm CMOS A/D Converter with 3-D Fully Symmetrical Capacitors. IEICE Trans. Electron. 89-C(5): 630-635 (2006) - [j8]Young-Jae Cho, Se-Won Kim, Kyung-Hoon Lee, Hee-Cheol Choi, Young-Lok Kim, Seung-Hoon Lee:
An Embedded 8b 240 MS/s 1.36 mm2 104 mW 0.18 µCMOS ADC for DVDs with Dual-Mode Inputs. IEICE Trans. Electron. 89-C(5): 636-641 (2006) - [c11]Young-Jae Cho, Kyung-Hoon Lee, Hee-Cheol Choi, Young-Ju Kim, Kyoung-Jun Moon, Seung-Hoon Lee, Seok-Bong Hyun, Seong-Su Park:
A Dual-Channel 6b 1GS/s 0.18um CMOS ADC for Ultra Wide-Band Communication Systems. APCCAS 2006: 339-342 - [c10]Kyung-Hoon Lee, Young-Jae Cho, Hee-Cheol Choi, Yong-Hyun Park, Doo-Hwan Sa, Young-Lok Kim, Seung-Hoon Lee:
A 14b 100MS/s 3.4mm2 145mW 0.18um CMOS Pipeline A/D Converter. APCCAS 2006: 351-354 - [c9]Young-Jae Cho, Kyung-Hoon Lee, Hee-Cheol Choi, Seung-Hoon Lee, Kyoung-Ho Moon, Jae-Whui Kim:
A Calibration-Free 14b 70MS/s 3.3mm2 235mW 0.13um CMOS Pipeline ADC with High-Matching 3-D Symmetric Capacitors. CICC 2006: 485-488 - [c8]Young-Jae Cho, Doo-Hwan Sa, Yong-Woo Kim, Kyung-Hoon Lee, Hee-Cheol Choi, Seung-Hoon Lee, Young-Deuk Jeon, Seung-Chul Lee, Jong-Kee Kwon:
A 10b 25MS/s 4.8mW 0.13um CMOS ADC for Digital Multimedia Broadcasting Applications. CICC 2006: 497-500 - 2005
- [j7]Young-Jae Cho, Hyuen-Hee Bae, Seung-Hoon Lee:
An 8b 220 MS/s 0.25 µm CMOS Pipeline ADC with On-Chip RC-Filter Based Voltage References. IEICE Trans. Electron. 88-C(4): 768-772 (2005) - [j6]Young-Jae Cho, Seung-Hoon Lee:
An 11b 70-MHz 1.2-mm2 49-mW 0.18-μm CMOS ADC with on-chip current/voltage references. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(10): 1989-1995 (2005) - [c7]Se-Won Kim, Young-Jae Cho, Kyung-Hoon Lee, Seung-Hoon Lee, Jae-Yup Lee, Hyun-Chul Noh, Hee-Sub Lee:
An 8b 240 MS/s 1.36 mm2 104 mW 0.18 um CMOS ADC for DVDs with dual-mode inputs. ISCAS (4) 2005: 4054-4057 - 2004
- [j5]Jong-Bum Park, Sang-Min Yoo, Se-Won Kim, Young-Jae Cho, Seung-Hoon Lee:
A 10-b 150-MSample/s 1.8-V 123-mW CMOS A/D converter with 400-MHz input bandwidth. IEEE J. Solid State Circuits 39(8): 1335-1337 (2004) - [j4]Sang-Min Yoo, Jong-Bum Park, Seung-Hoon Lee, Un-Ku Moon:
A 2.5-V 10-b 120-MSample/s CMOS pipelined ADC based on merged-capacitor switching. IEEE Trans. Circuits Syst. II Express Briefs 51-II(5): 269-275 (2004) - 2002
- [c6]Sang-Min Yoo, Tae-Hwan Oh, Jung-Woong Moon, Seung-Hoon Lee, Un-Ku Moon:
A 2.5 V 10 b 120 MSample/s CMOS pipelined ADC with high SFDR. CICC 2002: 441-444 - 2000
- [c5]Young-Deuk Jeon, Byeong-Lyeol Jeon, Seung-Chul Lee, Sang-Min Yoo, Seung-Hoon Lee:
A 12b 50 MHz 3.3V CMOS acquisition time minimized A/D converter. ASP-DAC 2000: 613-616 - [c4]Young-Deuk Jeon, Seung-Chul Lee, Sang-Min Yoo, Seung-Hoon Lee:
Acquisition-time minimization and merged-capacitor switching techniques for sampling-rate and resolution improvement of CMOS ADCs. ISCAS 2000: 451-454
1990 – 1999
- 1999
- [j3]Byeong-Lyeol Jeon, Seung-Hoon Lee:
A 10 b 50 MHz 320 mW CMOS A/D converter for video applications. IEEE Trans. Consumer Electron. 45(1): 252-258 (1999) - [c3]Byeong-Lyeol Jeon, Kang-Jin Lee, Seung-Hoon Lee, Sang-Won Yoon:
A 10b 50 MHz CMOS A/D Converter for High-Speed Video Applications. ASP-DAC 1999: 29-32 - [c2]Jin-Kug Lee, Dong-Young Chang, Geun-Soon Kang, Seung-Hoon Lee:
A Single-Chip CMOS CCD Camera Interface Circuit with Digitally Controlled AGC. ASP-DAC 1999: 45-48 - [c1]Jin-Kug Lee, Dong-Young Chang, Geun-Soon Kang, Seung-Hoon Lee:
A Single-Chip CMOS CCD Camera Interface Circuit with Digitally Controlled AGC. ASP-DAC 1999: 273 - 1998
- [j2]Dong-Young Chang, Seung-Hoon Lee:
Design techniques for a low-power low-cost CMOS A/D converter. IEEE J. Solid State Circuits 33(8): 1244-1248 (1998) - 1996
- [j1]Gil-Cho Ahn, Hee-Cheol Choi, Shin-Il Lim, Seung-Hoon Lee, Chul-Dong Lee:
A 12-b, 10-MHz, 250-mW CMOS A/D converter. IEEE J. Solid State Circuits 31(12): 2030-2035 (1996)
Coauthor Index
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