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ORCIDXi Wang 0009
Person information
- affiliation: Southeast University, China
- affiliation (former): Texas Tech University, Lubbock, Texas, USA
Other persons with the same name
- Xi Wang — disambiguation page
- Xi Wang 0001 — Fujitsu Laboratories of America, Richardson, TX, USA (and 1 more)
- Xi Wang 0002
![[0000-0002-7572-6354]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0002-7572-6354")
— Max-Delbrück-Center for Molecular Medicine, Berlin, Germany (and 2 more) - Xi Wang 0003 — Ocean University of China, Qingdao, Shandong, China
- Xi Wang 0004 — National University of Singapore, Department of Electrical and Computer Engineering, Singapore
- Xi Wang 0005 — University of Washington, Seattle, WA, USA (and 1 more)
- Xi Wang 0006 — Soochow University, Suzhou, China (and 1 more)
- Xi Wang 0007 — Donghua University, Shanghai, China
- Xi Wang 0008 — Fudan University, Shanghai, China
- Xi Wang 0010 — Central University of Finance and Economics, Beijing, China (and 1 more)
- Xi Wang 0011 — University of Houston, TX, USA
- Xi Wang 0012 — University of Sheffield, UK (and 2 more)
- Xi Wang 0013 — Chinese University of Hong Kong, Department of Computer Science and Engineering, Hong Kong (and 1 more)
- Xi Wang 0014 — University of Chinese Academy of Sciences, Beijing, China (and 1 more)
- Xi Wang 0015 — Xidian University, School of Electro-Mechanical Engineering, Xi'an, China (and 1 more)
- Xi Wang 0016 — Microsoft Cloud and AI, Bejing, China
- Xi Wang 0017 — Shanghai University, School of Computer Engineering and Science, China (and 1 more)
- Xi Wang 0018 — National University of Defense Technology, College of Computer, Changsha, China
- Xi Wang 0019 — University of Nottingham, Nottingham, UK
- Xi Wang 0020 — Beijing Jiaotong University, Beijing, China
- Xi Wang 0021 — ETH Zurich, Zurich, Switzerland
- Xi Wang 0022 — Southwest Jiaotong University, Chengdu, China
- Xi Wang 0023 — Shanghai Jiao Tong University, Shanghai, China
- Xi Wang 0024 — Team VISTA, LIX, École Polytechnique, Paris, France
- Xi Wang 0025 — Harbin Institute of Technology, Harbin, Heilongjiang, China
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2020 – today
- 2025
[c26]Juxin Niu, Xiangfeng Liu, Dan Niu, Xi Wang, Zhe Jiang, Nan Guan:
ReChisel: Effective Automatic Chisel Code Generation by LLM with Reflection. DAC 2025: 1-7- [c25]Bingkun Yao, Ning Wang, Jie Zhou, Xi Wang, Hong Gao, Zhe Jiang, Nan Guan:
Location is Key: Leveraging LLM for Functional Bug Localization in Verilog Design. DAC 2025: 1-7 - [c24]Junhao Ye, Yuchen Hu, Ke Xu, Dingrong Pan, Qichun Chen, Jie Zhou, Shuai Zhao, Xinwei Fang, Xi Wang, Nan Guan, Zhe Jiang:
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification. ICCAD 2025: 1-9 - [i10]Ning Wang, Bingkun Yao, Jie Zhou, Yuchen Hu, Xi Wang, Nan Guan, Zhe Jiang:
Insights from Verification: Training a Verilog Generation LLM with Reinforcement Learning with Testbench Feedback. CoRR abs/2504.15804 (2025) - [i9]Ning Wang, Bingkun Yao, Jie Zhou, Yuchen Hu, Xi Wang, Nan Guan, Zhe Jiang:
VeriDebug: A Unified LLM for Verilog Debugging via Contrastive Embedding and Guided Correction. CoRR abs/2504.19099 (2025) - [i8]Junhao Ye, Yuchen Hu, Ke Xu, Dingrong Pan, Qichun Chen, Jie Zhou, Shuai Zhao, Xinwei Fang, Xi Wang, Nan Guan, Zhe Jiang:
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification. CoRR abs/2504.19959 (2025) - [i7]Juxin Niu, Xiangfeng Liu, Dan Niu, Xi Wang, Zhe Jiang, Nan Guan:
ReChisel: Effective Automatic Chisel Code Generation by LLM with Reflection. CoRR abs/2505.19734 (2025) - [i6]Gwok-Waa Wan, Shengchu Su, Ruihu Wang, Qixiang Chen, Sam-Zaak Wong, Mengnv Xing, Hefei Feng, Yubo Wang, Yinan Zhu, Jingyi Zhang, Jianmin Ye, Xinlai Wan, Tao Ni, Qiang Xu, Nan Guan, Zhe Jiang, Xi Wang, Yang Jun:
FIXME: Towards End-to-End Benchmarking of LLM-Aided Design Verification. CoRR abs/2507.04276 (2025) - [i5]Juxin Niu, Yuxin Du, Dan Niu, Xi Wang, Zhe Jiang, Nan Guan:
VerilogMonkey: Exploring Parallel Scaling for Automated Verilog Code Generation with LLMs. CoRR abs/2509.16246 (2025) - [i4]Changwen Xing, SamZaak Wong, Xinlai Wan, Yanfeng Lu, Mengli Zhang, Zebin Ma, Lei Qi, Zhengxiong Li, Nan Guan, Zhe Jiang, Xi Wang, Jun Yang:
ChipMind: Retrieval-Augmented Reasoning for Long-Context Circuit Design Specifications. CoRR abs/2512.05371 (2025) - 2024
- [j5]Cai Li, Haochang Zhi, Kaiyue Yang, Junyi Qian, Zhihao Yan, Lixuan Zhu, Chao Chen, Xi Wang, Weiwei Shan:
A 0.61-μW Fully Integrated Keyword-Spotting ASIC With Real-Point Serial FFT-Based MFCC and Temporal Depthwise Separable CNN. IEEE J. Solid State Circuits 59(3): 867-877 (2024) - [j4]Yuxuan Du, Junyi Qian, Zhengguo Shen, Chengjun Wu, Weiwei Shan, Xi Wang:
DSC-TRCP: Dynamically Self-Calibrating Tunable Replica Critical Paths Based Timing Monitoring for Variation Resilient Circuits. IEEE J. Solid State Circuits 59(7): 2286-2296 (2024) - [c23]Yuchen Hu, Ke Xu, Jialin Sun, Xinwei Fang, Weiwei Shan, Xi Wang, Zhe Jiang:
Make Each Iteration Count. ACM TUR-C 2024 - [c22]Xi Wang, Gwok-Waa Wan, Sam-Zaak Wong, Layton Zhang, Tianyang Liu, Qi Tian, Jianmin Ye:
ChatCPU: An Agile CPU Design and Verification Platform with LLM. DAC 2024: 212:1-212:6 - [c21]Gwok-Waa Wan, Sam-Zaak Wong, Xi Wang:
Jailbreaking Pre-trained Large Language Models Towards Hardware Vulnerability Insertion Ability. ACM Great Lakes Symposium on VLSI 2024: 579-582 - [c20]Ke Xu, Jialin Sun, Yuchen Hu, Xinwei Fang, Weiwei Shan, Xi Wang, Zhe Jiang:
MEIC: Re-thinking RTL Debug Automation using LLMs. ICCAD 2024: 100:1-100:9 - [i3]Ning Wang, Bingkun Yao, Jie Zhou, Xi Wang, Zhe Jiang, Nan Guan:
Large Language Model for Verilog Generation with Golden Code Feedback. CoRR abs/2407.18271 (2024) - [i2]Bingkun Yao, Ning Wang, Jie Zhou, Xi Wang, Hong Gao, Zhe Jiang, Nan Guan:
Location is Key: Leveraging Large Language Model for Functional Bug Localization in Verilog. CoRR abs/2409.15186 (2024) - [i1]Yuchen Hu, Junhao Ye, Ke Xu, Jialin Sun, Shiyue Zhang, Xinyao Jiao, Dingrong Pan, Jie Zhou, Ning Wang, Weiwei Shan, Xinwei Fang, Xi Wang, Nan Guan, Zhe Jiang:
UVLLM: An Automated Universal RTL Verification Framework using LLMs. CoRR abs/2411.16238 (2024) - 2023
- [c19]Tao Xu, Xi Wang, Jianping He:
Differential Game with Mixed Strategies: A Weak Approximation Approach. CDC 2023: 5216-5221 - 2021
- [j3]Xi Wang, Antonino Tumeo, John D. Leidel, Jie Li, Yong Chen:
HAM: Hotspot-Aware Manager for Improving Communications With 3D-Stacked Memory. IEEE Trans. Computers 70(6): 833-848 (2021) - [c18]Zach Hansen, Brody Williams, John D. Leidel, Xi Wang, Yong Chen:
DMM-GAPBS: Adapting the GAP Benchmark Suite to a Distributed Memory Model. HPEC 2021: 1-8 - [c17]Xi Wang, John D. Leidel, Brody Williams, Alan Ehret, Miguel Mark, Michel A. Kinsy, Yong Chen:
xBGAS: A Global Address Space Extension on RISC-V for High Performance Computing. IPDPS 2021: 454-463 - [c16]Brody Williams, John D. Leidel, Xi Wang, David Donofrio, Yong Chen:
CircusTent: A Tool for Measuring the Performance of Atomic Memory Operations on Emerging Architectures. OpenSHMEM 2021: 92-110 - 2020
- [j2]John D. Leidel, Xi Wang, Brody Williams, Yong Chen:
Toward a Microarchitecture for Efficient Execution of Irregular Applications. ACM Trans. Parallel Comput. 7(4): 26:1-26:24 (2020) - [c15]Xi Wang, Brody Williams, John D. Leidel, Alan Ehret, Michel A. Kinsy, Yong Chen:
Remote Atomic Extension (RAE) for Scalable High Performance Computing. DAC 2020: 1-6 - [c14]Xi Wang, John D. Leidel, Brody Williams, Yong Chen:
PAC: Paged Adaptive Coalescer for 3D-Stacked Memory. HPDC 2020: 137-148 - [c13]Brody Williams, John D. Leidel, Xi Wang, David Donofrio, Yong Chen:
CircusTent: A Benchmark Suite for Atomic Memory Operations. MEMSYS 2020: 144-157
2010 – 2019
- 2019
- [c12]Xi Wang, Jie Li, Antonino Tumeo, John D. Leidel, Yong Chen:
POSTER: Memory Hotspot Optimization for Data-Intensive Applications. PACT 2019: 467-468 - [c11]Xi Wang, Antonino Tumeo, John D. Leidel, Jie Li, Yong Chen:
MAC: Memory Access Coalescer for 3D-Stacked Memory. ICPP 2019: 2:1-2:10 - [c10]Brody Williams, Xi Wang, John D. Leidel, Yong Chen:
Collective Communication for the RISC-V xBGAS ISA Extension. ICPP Workshops 2019: 17:1-17:10 - [c9]Jie Li, Xi Wang, Antonino Tumeo, Brody Williams, John D. Leidel, Yong Chen:
PIMS: a lightweight processing-in-memory accelerator for stencil computations. MEMSYS 2019: 41-52 - 2018
- [c8]John D. Leidel, Xi Wang, Yong Chen:
GoblinCore-64: A RISC-V Based Architecture for Data Intensive Computing. HPEC 2018: 1-8 - [c7]Xi Wang, John D. Leidel, Yong Chen:
Memory Coalescing for Hybrid Memory Cube. ICPP 2018: 62:1-62:10 - [c6]John D. Leidel, Xi Wang, Frank Conlon, Yong Chen, David Donofrio, Farzad Fatollahi-Fard, Kurt Keville:
xBGAS: Toward a RISC-V ISA Extension for Global, Scalable Shared Memory. MCHPC@SC 2018: 22-26 - 2017
- [c5]Farzad Fatollahi-Fard, David Donofrio, John Shalf, John D. Leidel, Xi Wang, Yong Chen:
OpenSoC system architect: An open toolkit for building soft-cores on FPGAs. FPL 2017: 1 - [c4]Xi Wang, John D. Leidel, Yong Chen:
OpenMP Memkind: An Extension for Heterogeneous Physical Memories. ICPP Workshops 2017: 220-227 - [c3]John D. Leidel, Xi Wang, Yong Chen:
Pressure-Driven Hardware Managed Thread Concurrency for Irregular Applications. IA3@SC 2017: 7:1-7:8 - 2016
- [c2]Xi Wang, John D. Leidel, Yong Chen:
Concurrent Dynamic Memory Coalescing on GoblinCore-64 Architecture. MEMSYS 2016: 177-187
2000 – 2009
- 2009
- [j1]Xi Wang, Chunyu Yang, Jie Zhou:
Clustering aggregation by probability accumulation. Pattern Recognit. 42(5): 668-675 (2009) - 2008
- [c1]Xi Wang, Chunyu Yang, Jie Zhou:
Spectral aggregation for clustering ensemble. ICPR 2008: 1-4
Coauthor Index
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