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ACM Transactions in Embedded Computing Systems, Volume 9
Volume 9, Number 1, October 2009
- Toomas P. Plaks, Neil Bergmann

, Bernard Pottier:
Guest editorial CAPA'08 configurable computing: Configuring algorithms, processes, and architecture issue I: Configuring algorithms and processes. 1:1-1:5 - Bonnie H. Ferri, Aldo A. Ferri:

Reconfiguration of IIR filters in response to computer resource availability. 2:1-2:25 - Xiaojun Wang, Miriam Leeser

:
A truly two-dimensional systolic array FPGA implementation of QR decomposition. 3:1-3:17 - Amilcar do Carmo Lucas, Henning Sahlbach, Sean Whitty, Sven Heithecker, Rolf Ernst:

Application development with the FlexWAFE real-time stream processing architecture for FPGAs. 4:1-4:23 - Ani Nahapetian, Philip Brisk

, Soheil Ghiasi, Majid Sarrafzadeh:
An approximation algorithm for scheduling on heterogeneous reconfigurable resources. 5:1-5:20 - Cameron D. Patterson, Peter Athanas, Matthew Shelburne, John W. Bowen

, Jorge Surís, T. Dunham, J. Rice:
Slotless module-based reconfiguration of embedded FPGAs. 6:1-6:26 - Scott Lloyd, Quinn Snell:

A packet-switched network architecture for reconfigurable computing. 7:1-7:17 - Enno Lübbers, Marco Platzner

:
ReconOS: Multithreaded programming for reconfigurable computers. 8:1-8:33 - Jian Huang, Matthew Parris, Jooheung Lee

, Ronald F. DeMara
:
Scalable FPGA-based architecture for DCT computation using dynamic partial reconfiguration. 9:1-9:18
Volume 9, Number 2, October 2009
- Toomas P. Plaks, Neil Bergmann

, Bernard Pottier:
Guest editorial CAPA'08 Configurable computing: Configuring algorithms, processes, and architecture Issue II: Configuring hardware architecture. 10:1-10:3 - Mythri Alle, Keshavan Varadarajan, Alexander Fell

, C. Ramesh Reddy, Joseph Nimmy, Saptarsi Das, Prasenjit Biswas, Jugantor Chetia, Adarsha Rao, S. K. Nandy, Ranjani Narayan:
REDEFINE: Runtime reconfigurable polymorphic ASIC. 11:1-11:48 - Pritha Banerjee

, Susmita Sur-Kolay, Arijit Bishnu, Sandip Das, Subhas C. Nandy, Subhasis Bhattacharjee
:
FPGA placement using space-filling curves: Theory meets practice. 12:1-12:23 - Paul Beckett:

Power scalability in a mesh-connected reconfigurable architecture. 13:1-13:28 - Weisheng Zhao, Eric Belhaire, Claude Chappert, Pascale Mazoyer:

Spin transfer torque (STT)-MRAM-based runtime reconfiguration FPGA circuit. 14:1-14:16
Volume 9, Number 3, February 2010
- Hyung Sun Lee, Byung Kook Kim:

Coscheduling of processor voltage and control task period for energy-efficient control systems. 15:1-15:24 - Rakesh Reddy, Peter Petrov:

Cache partitioning for energy-efficient and interference-free embedded multitasking. 16:1-16:35 - Bert Geelen, Vissarion Ferentinos, Francky Catthoor, Gauthier Lafruit, Diederik Verkest, Rudy Lauwereins, Thanos Stouraitis

:
Modeling and exploiting spatial locality trade-offs in wavelet-based applications under varying resource requirements. 17:1-17:26 - David Bueno

, Chris Conger, Alan D. George
:
Optimizing rapidIO architectures for onboard processing. 18:1-18:30 - Hiroaki Inoue, Junji Sakai, Masato Edahiro:

A robust seamless communication architecture for next-generation mobile terminals on multi-CPU SoCs. 19:1-19:28 - Adam Manzanares, Xiaojun Ruan, Shu Yin, Xiao Qin

, Adam Roth, Mais Nijim:
Conserving energy in real-time storage systems with I/O burstiness. 20:1-20:21 - Alexandre Courbot, Gilles Grimaud, Jean-Jacques Vandewalle:

Efficient off-board deployment and customization of virtual machine-based embedded systems. 21:1-21:53 - Chun Jason Xue

, Jingtong Hu
, Zili Shao
, Edwin Hsing-Mean Sha:
Iterational retiming with partitioning: Loop scheduling with complete memory latency hiding. 22:1-22:26 - Hyeonjoong Cho, Binoy Ravindran

, E. Douglas Jensen:
Lock-free synchronization for dynamic embedded real-time systems. 23:1-23:28 - Enric Musoll:

A cost-effective load-balancing policy for tile-based, massive multi-core packet processors. 24:1-24:25 - Liang Guang, Ethiopia Nigussie, Pekka Rantala, Jouni Isoaho

, Hannu Tenhunen
:
Hierarchical agent monitoring design approach towards self-aware parallel systems-on-chip. 25:1-25:24 - Ian Vince McLoughlin

, Timo Rolf Bretschneider:
Reliability through redundant parallelism for micro-satellite computing. 26:1-26:25 - Lei Yang, Robert P. Dick, Haris Lekatsas, Srimat T. Chakradhar:

Online memory compression for embedded systems. 27:1-27:30 - Ulpian Cesana, Zhen He

:
Multi-buffer manager: Energy-efficient buffer manager for databases on flash memory. 28:1-28:36 - Milan Tichý, Jan Schier, David Gregg:

GSFAP adaptive filtering using log arithmetic for resource-constrained embedded systems. 29:1-29:31
Volume 9, Number 4, March 2010
- Lei Yang, Robert P. Dick, Haris Lekatsas, Srimat T. Chakradhar:

High-performance operating system controlled online memory compression. 30:1-30:28 - Chin-Hsien Wu:

A self-adjusting flash translation layer for resource-limited embedded systems. 31:1-31:26 - Ali Irturk, Bridget Benson, Shahnam Mirzaei

, Ryan Kastner
:
GUSTO: An automatic generation and optimization tool for matrix inversion architectures. 32:1-32:21 - Yue Yu

, Shangping Ren, Ophir Frieder:
Feasibility of semiring-based timing constraints. 33:1-33:24 - Seyed-Abdoreza Tahaee, Amir-Hossein Jahangir

:
A polynomial algorithm for partitioning problems. 34:1-34:38 - Huan-Kai Peng, Youn-Long Lin:

An optimal warning-zone-length assignment algorithm for real-time and multiple-QoS on-chip bus arbitration. 35:1-35:39 - Bastian Schlich:

Model checking of software for microcontrollers. 36:1-36:27 - Nicola Bombieri

, Franco Fummi, Davide Quaglia
:
System/network design-space exploration based on TLM for networked embedded systems. 37:1-37:32 - Chang Hong Lin, Marilyn Wolf, Xenofon D. Koutsoukos, Sandeep Neema

, Janos Sztipanovits:
System and software architectures of distributed smart cameras. 38:1-38:30 - Gang Zhou, Yafeng Wu, Ting Yan, Tian He, Chengdu Huang, John A. Stankovic, Tarek F. Abdelzaher:

A multifrequency MAC specially designed for wireless sensor network applications. 39:1-39:41 - Dawoon Jung, Jeong-Uk Kang, Heeseung Jo, Jinsoo Kim, Joonwon Lee:

Superblock FTL: A superblock-based flash translation layer with a hybrid address translation scheme. 40:1-40:41 - Kevin Klues, Guoliang Xing, Chenyang Lu:

Link layer driver architecture for unified radio power management in wireless sensor networks. 41:1-41:28 - Jupyung Lee, Kyu Ho Park:

Interrupt handler migration and direct interrupt scheduling for rapid scheduling of interrupt-driven tasks. 42:1-42:34 - Chiu C. Tan, Bo Sheng

, Haodong Wang, Qun Li
:
Microsearch: A search engine for embedded devices used in pervasive computing. 43:1-43:29

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