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ORCIDCASES 2005: San Francisco, California, USA
- Thomas M. Conte, Paolo Faraboschi, William H. Mangione-Smith, Walid A. Najjar:
Proceedings of the 2005 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2005, San Francisco, California, USA, September 24-27, 2005. ACM 2005, ISBN 1-59593-149-X - Michael Wolfe:
How compilers and tools differ for embedded systems. 1
Hardware specialization
- Laura Pozzi, Paolo Ienne:
Exploiting pipelining to relax register-file port constraints of instruction-set extensions. 2-10 - Sami Yehia, Nathan Clark, Scott A. Mahlke, Krisztián Flautner:
Exploring the design space of LUT-based transparent accelerators. 11-21 - Ray C. C. Cheung
, Dong-U Lee, Oskar Mencer, Wayne Luk, Peter Y. K. Cheung:
Automating custom-precision function evaluation for embedded processors. 22-31 - Rony Ghattas, Alexander G. Dean:
Energy management for commodity short-bit-width microcontrollers. 32-42
Security
- Tao Zhang, Xiaotong Zhuang, Santosh Pande, Wenke Lee:
Anomalous path detection with hardware support. 43-54 - Milena Milenkovic, Aleksandar Milenkovic, Emil Jovanov:
Hardware support for code integrity in embedded processors. 55-65 - Matthew S. Simpson, Bhuvan Middha, Rajeev Barua:
Segment protection for embedded systems using run-time checks. 66-77 - Joel Coburn, Srivaths Ravi, Anand Raghunathan, Srimat T. Chakradhar:
SECA: security-enhanced communication architecture. 78-89
Memories
- Aviral Shrivastava, Ilya Issenin, Nikil D. Dutt:
Compilation techniques for energy reduction in horizontally partitioned cache architectures. 90-96 - Montserrat Ros, Peter Sutton:
A post-compilation register reassignment technique for improving hamming distance code compression. 97-104 - Guangyu Chen, Mahmut T. Kandemir:
Verifiable annotations for embedded java environments. 105-114 - Nghi Nguyen, Angel Dominguez, Rajeev Barua:
Memory allocation for embedded systems with a compile-time-unknown scratch-pad size. 115-125
Compilation
- Sitij Agrawal, William Thies, Saman P. Amarasinghe:
Optimizing stream programs using linear state space analysis. 126-136 - Feihui Li, Guangyu Chen, Mahmut T. Kandemir, Mary Jane Irwin:
Compiler-directed proactive power management for networks. 137-146 - Mohammad Ali Ghodrat, Tony Givargis, Alexandru Nicolau:
Equivalence checking of arithmetic expressions using fast evaluation. 147-156 - Hyunok Oh, Nikil D. Dutt, Soonhoi Ha:
Single appearance schedule with dynamic loop count for minimum data buffer from synchronous dataflow graphs. 157-165
OS
- Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero:
Architectural support for real-time task scheduling in SMT processors. 166-176 - Stefan Valentin Gheorghita, Twan Basten, Henk Corporaal:
Intra-task scenario-aware voltage scheduling. 177-184 - A. Goel, C. Mani Krishna, Israel Koren:
Energy aware kernel for hard real-time systems. 185-190 - Bhuvan Middha, Matthew S. Simpson, Rajeev Barua:
MTSS: multi task stack sharing for embedded systems. 191-201
Architecture
- Peter Yiannacouras, Jonathan Rose, J. Gregory Steffan:
The microarchitecture of FPGA-based soft processors. 202-212 - Ali El-Haj-Mahmoud, Ahmed S. Al-Zawawi, Aravindh Anantaraman, Eric Rotenberg:
Virtual multiprocessor: an analyzable, high-performance architecture for real-time computing. 213-224 - Xin Li, Jan Lukoschus, Marian Boldt, Michael Harder, Reinhard von Hanxleden:
An Esterel processor with full preemption support and its worst case reaction time analysis. 225-236 - Thomas Y. Yeh, Glenn Reinman:
Fast and fair: data-stream quality of service. 237-248
Communication systems
- Leyla Nazhandali, Michael Minuth, Bo Zhai, Javin Olson, Todd M. Austin, David T. Blaauw:
A second-generation sensor network processor with application-driven memory optimizations and out-of-order execution. 249-256 - Hyunseok Lee, Trevor N. Mudge:
A dual-processor solution for the MAC layer of a software defined radio terminal. 257-265 - Suman Mamidi, Emily R. Blem, Michael J. Schulte, C. John Glossner, Daniel Iancu, Andrei Iancu, Mayan Moudgill, Sanjay Jinturkar:
Instruction set extensions for software defined radio on a multithreaded processor. 266-273 - Vassos Soteriou, Noel Eisley, Li-Shiuan Peh:
Software-directed power-aware interconnection networks. 274-285
Threads
- Siddhartha Shivshankar, Sunil Vangara, Alexander G. Dean:
Balancing register pressure and context-switching delays in ASTI systems. 286-294 - Matthew D. Roper, Ronald A. Olsson:
Developing embedded multi-threaded applications with CATAPULTS, a domain-specific language for generating thread schedulers. 295-303 - Roshan G. Ragel, Sri Parameswaran, Sayed Mohammad Kia:
Micro embedded monitoring for security in application specific instruction-set processors. 304-314
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