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ORCID29th ARCS 2016: Nuremberg, Germany
- Frank Hannig
, João M. P. Cardoso, Thilo Pionteck, Dietmar Fey, Wolfgang Schröder-Preikschat, Jürgen Teich:
Architecture of Computing Systems - ARCS 2016 - 29th International Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings. Lecture Notes in Computer Science 9637, Springer 2016, ISBN 978-3-319-30694-0
Configurable and In-Memory Accelerators
- Anita Tino, Kaamran Raahemifar:
Towards Multicore Performance with Configurable Computing Units. 3-18 - Erfan Azarkhish, Davide Rossi, Igor Loi, Luca Benini:
Design and Evaluation of a Processing-in-Memory Architecture for the Smart Memory Cube. 19-31
Network-on-Chip and Secure Computing Architectures
- Gnaneswara Rao Jonna, Vamana Murthi Thuniki, Madhu Mutyam:
CASCADE: Congestion Aware Switchable Cycle Adaptive Deflection Router. 35-47 - Armin Runge, Reiner Kolla:
An Alternating Transmission Scheme for Deflection Routing Based Network-on-Chips. 48-59 - Alexander Würstlein, Michael Gernoth, Johannes Götzfried, Tilo Müller:
Exzess: Hardware-Based RAM Encryption Against Physical Memory Disclosure. 60-71 - Ying Gao, Timothy Sherwood:
Hardware-Assisted Context Management for Accelerator Virtualization: A Case Study with RSA. 72-83
Cache Architectures and Protocols
- Carsten Tradowsky, Enrique Cordero, Christoph Orsinger, Malte Vesper, Jürgen Becker:
Adaptive Cache Structures. 87-99 - Ricardo Fernández-Pascual, Alberto Ros, Manuel E. Acacio:
Optimization of a Linked Cache Coherence Protocol for Scalable Manycore Coherence. 100-112
Mapping of Applications on Heterogeneous Architectures and Real-Time Tasks on Multiprocessors
- Stéphane Vialle, Sylvain Contassot-Vivier, Patrick P. Mercier:
Generic Algorithmic Scheme for 2D Stencil Applications on Hybrid Machines. 115-129 - Ernst Joachim Houtgast, Vlad Mihai Sima, Koen Bertels, Zaid Al-Ars:
GPU-Accelerated BWA-MEM Genomic Mapping Algorithm Using Adaptive Load Balancing. 130-142 - Martin Böhnert, Christoph Scholl:
Task Variants with Different Scratchpad Memory Consumption in Multi-Task Environments. 143-156 - Piotr Dziurzanski, Amit Kumar Singh, Leandro Soares Indrusiak:
Feedback-Based Admission Control for Hard Real-Time Task Allocation Under Dynamic Workload on Many-Core Systems. 157-169
All About Time: Timing, Tracing, and Performance Modeling
- Christian Bradatsch, Florian Kluge, Theo Ungerer:
Data Age Diminution in the Logical Execution Time Model. 173-184 - Sebastian Stieber, Rainer Dorsch, Christian Haubelt:
Accurate Sample Time Reconstruction for Sensor Data Synchronization. 185-196 - Philipp Wagner, Thomas Wild, Andreas Herkersdorf:
DiaSys: On-Chip Trace Analysis for Multi-processor System-on-Chip. 197-209 - Johannes Hofmann, Dietmar Fey, Jan Eitzinger, Georg Hager, Gerhard Wellein:
Analysis of Intel's Haswell Microarchitecture Using the ECM Model and Microbenchmarks. 210-222 - Kostiantyn Berezovskyi, Fabrice Guet, Luca Santinelli, Konstantinos Bletsas, Eduardo Tovar:
Measurement-Based Probabilistic Timing Analysis for Graphics Processor Units. 223-236
Approximate and Energy-Efficient Computing
- Michael Bromberger, Vincent Heuveline, Wolfgang Karl:
Reducing Energy Consumption of Data Transfers Using Runtime Data Type Conversion. 239-250 - Valery Kritchallo, Billy Braithwaite, Erik Vermij, Koen Bertels, Zaid Al-Ars:
Balancing High-Performance Parallelization and Accuracy in Canny Edge Detector. 251-262 - Rafael Rosales, Christian Herglotz, Michael Glaß, André Kaup, Jürgen Teich:
Analysis and Exploitation of CTU-Level Parallelism in the HEVC Mode Decision Process Using Actor-Based Modeling. 263-276 - Marius Marcu, Oana Boncalo, Madalin Ghenea, Alexandru Amaricai, Jan Weinstock, Rainer Leupers, Zheng Wang, Giorgis Georgakoudis, Dimitrios S. Nikolopoulos, Cosmin Cernazanu-Glavan, Lucian Bara, Marian Ionascu:
Low-Cost Hardware Infrastructure for Runtime Thread Level Energy Accounting. 277-289
Allocation: From Memories to FPGA Hardware Modules
- Vishwanathan Chandru, Frank Mueller:
Reducing NoC and Memory Contention for Manycores. 293-305 - Sándor P. Fekete, Jan-Marc Reinhardt, Christian Scheffer:
An Efficient Data Structure for Dynamic Two-Dimensional Reconfiguration. 306-318
Organic Computing Systems
- Jan Kantert, Richard Scharrer, Sven Tomforde, Sarah Edenhofer, Christian Müller-Schloer:
Runtime Clustering of Similarly Behaving Agents in Open Organic Computing Systems. 321-333 - Stefan Rudolph, Rainer Hihn, Sven Tomforde, Jörg Hähner:
Comparison of Dependency Measures for the Detection of Mutual Influences in Organic Computing Systems. 334-347 - Anthony Stein, Dominik Rauh, Sven Tomforde, Jörg Hähner:
Augmenting the Algorithmic Structure of XCS by Means of Interpolation. 348-360
Reliability Aspects in NoCs, Caches, and GPUs
- Michael Vonbun, Thomas Wild, Andreas Herkersdorf:
Estimation of End-to-End Packet Error Rates for NoC Multicasts. 363-374 - Sanem Arslan, Haluk Rahmi Topcuoglu, Mahmut Taylan Kandemir, Oguz Tosun:
Protecting Code Regions on Asymmetrically Reliable Caches. 375-387 - Sarah Azimi, Boyang Du, Luca Sterpone:
A New Simulation-Based Fault Injection Approach for the Evaluation of Transient Errors in GPGPUs. 388-400
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