"A 1.25Gbps all-digital clock and data recovery circuit with binary ..."

Chi-Shuang Oulee, Rong-Jyi Yang (2008)

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DOI: 10.1109/APCCAS.2008.4746115

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Chi-Shuang Oulee, Rong-Jyi Yang:
A 1.25Gbps all-digital clock and data recovery circuit with binary frequency acquisition. APCCAS 2008: 680-683

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