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ORCIDXing Huang 0001
Person information
- affiliation: Northwestern Polytechnical University, School of Computer Science, Xi'an, China
- affiliation: Technical University of Munich, Chair of Electronic Design Automation, Munich, Germany
- affiliation (PhD 2018): Fuzhou University, College of Mathematics and Computer Science, Fuzhou, China
Other persons with the same name
- Xing Huang — disambiguation page
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2020 – today
- 2026
[j35]Shuang Qi, Zhiwen Yu, Bin Guo, Sizhao Li, Zipeng Li, Hanbin Ma, Tsung-Yi Ho, Krishnendu Chakrabarty, Xing Huang:
Design Automation Techniques for Microfluidic Fully Programmable Valve Array Biochips: A Systematic Survey. ACM Trans. Design Autom. Electr. Syst. 31(1): 1:1-1:31 (2026)- [j34]Huayang Cai, Genggeng Liu, Wenzhong Guo, Zipeng Li, Tsung-Yi Ho, Xing Huang:
Adaptive Control-Logic Routing with Length Matching and Fault Tolerance for FPVA Biochips Using Deep Reinforcement Learning. ACM Trans. Design Autom. Electr. Syst. 31(1): 3:1-3:22 (2026) - 2025
- [j33]Zhisheng Chen, Hongjin Su, Bohan Dong, Genggeng Liu
, Xing Huang:
SDCLR: Scalable Dual Control-Layer Routing for continuous-flow microfluidic biochips with minimized control ports. Integr. 104: 102445 (2025) - [j32]Xing Huang, Yuhan Zhu, Yanbo Xu, Yajun Xie, Genggeng Liu:
Multi-layer obstacle-avoiding rectilinear steiner minimal tree algorithm based on deep reinforcement learning. J. King Saud Univ. Comput. Inf. Sci. 37(7) (2025) - [j31]Yuhan Zhu, Genggeng Liu, Wenzhong Guo, Xing Huang:
FTCD: Fault-Tolerant Co-Design of Flow and Control Layers for Fully Programmable Valve Array Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 44(7): 2669-2682 (2025) - [j30]Zhenkun Lin, Genggeng Liu, Xing Huang, Yibo Lin, Jixin Zhang, Wen-Hao Liu, Ting-Chi Wang:
A Unified Deep Reinforcement Learning Approach for Constructing Rectilinear and Octilinear Steiner Minimum Tree. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 44(7): 2711-2724 (2025) - [j29]Haoyang Xu, Xing Huang, Zhen Zhuang, Zhiwen Yu, Bin Guo, Kai-Yuan Chao, Bei Yu, Tsung-Yi Ho, Martin D. F. Wong:
Hierarchical Partitioning-Based Interchip Redistribution Layer Routing for Fan-Out Wafer-Level Packaging. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 44(11): 4367-4380 (2025) - [j28]Huayang Cai, Pengcheng Huang, Genggeng Liu, Xing Huang, Yidan Jing, Wenhao Liu, Ting-Chi Wang:
SPTA 2.0: Enhanced Scalable Parallel Track Assignment Algorithm with Two-Stage Partition Considering Timing Delay. ACM Trans. Design Autom. Electr. Syst. 30(2): 30:1-30:23 (2025) - [c27]Genggeng Liu, Pengcheng Huang, Zepeng Li, Wen-Hao Liu, Xing Huang, Wenzhong Guo:
Late Breaking Results: An Efficient and Scalable Track Assignment with GPU Parallelism. DAC 2025: 1-2 - [c26]Hongjin Su, Zhisheng Chen, Bowen Liu, Zhen Chen, Genggeng Liu, Xing Huang:
Application Mapping Method based on Particle Swarm Optimization for Continuous-Flow Microfluidic Biochips. ACM Great Lakes Symposium on VLSI 2025: 641-646 - [c25]Xinyue Jiao, Youlin Pan, Bowen Liu, Zhen Chen, Genggeng Liu, Xing Huang:
Timing-Driven Application Mapping for Continuous-Flow Microfluidic Biochips. ACM Great Lakes Symposium on VLSI 2025: 647-652 - 2024
- [j27]Genggeng Liu, Zhengyang Chen, Zhisheng Chen, Bowen Liu, Yu Zhang, Xing Huang:
Physical design for microfluidic biochips considering actual volume management and channel storage. Integr. 98: 102228 (2024) - [j26]Xing Huang, Huayang Cai, Wenzhong Guo, Genggeng Liu, Tsung-Yi Ho, Krishnendu Chakrabarty, Ulf Schlichtmann:
Control-Logic Synthesis of Fully Programmable Valve Array Using Reinforcement Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(1): 277-290 (2024) - [j25]Youlin Pan, Genggeng Liu, Xing Huang, Zipeng Li, Hsin-Chuan Huang, Chi-Chun Liang, Qining Wang, Chang-Jin Kim, Tsung-Yi Ho:
NR-Router+: Enhanced Non-Regular Electrode Routing With Optimal Pin Selection for Electrowetting-on-Dielectric Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(9): 2606-2619 (2024) - [j24]Zhisheng Chen, Xu Hu, Wenzhong Guo, Genggeng Liu, Jiaxuan Wang, Tsung-Yi Ho, Xing Huang:
Capacity-Aware Wash Optimization with Dynamic Fluid Scheduling and Channel Storage for Continuous-Flow Microfluidic Biochips. ACM Trans. Design Autom. Electr. Syst. 29(4): 1-28 (2024) - [j23]Yuhan Zhu, Genggeng Liu, Ren Lu, Xing Huang, Min Gan, Wenzhong Guo:
Timing-Driven Obstacle-Avoiding X-Architecture Steiner Minimum Tree Algorithm With Slack Constraints. IEEE Trans. Syst. Man Cybern. Syst. 54(5): 2927-2940 (2024) - [j22]Genggeng Liu, Yuhan Zhu, Zhen Zhuang, Zhenyu Pei, Min Gan, Xing Huang, Wenzhong Guo:
A Robust Multilayer X-Architecture Global Routing System Based on Particle Swarm Optimization. IEEE Trans. Syst. Man Cybern. Syst. 54(9): 5627-5640 (2024) - [c24]Huayang Cai, Genggeng Liu, Wenzhong Guo, Zipeng Li, Tsung-Yi Ho, Xing Huang:
Adaptive Control-Logic Routing for Fully Programmable Valve Array Biochips Using Deep Reinforcement Learning. ASPDAC 2024: 564-569 - [c23]Genggeng Liu, Yuqin Zeng, Yuhan Zhu, Huayang Cai, Wenzhong Guo, Zipeng Li, Tsung-Yi Ho, Xing Huang:
Towards Automated Testing of Multiplexers in Fully Programmable Valve Array Biochips. ASPDAC 2024: 570-575 - [c22]Xing Huang, Jiaxuan Wang, Zhiwen Yu, Bin Guo, Tsung-Yi Ho, Ulf Schlichtmann, Krishnendu Chakrabarty:
PathDriver-Wash: A Path-Driven Wash Optimization Method for Continuous-Flow Lab-on-a-Chip Systems. DATE 2024: 1-6 - [c21]Yangjie Wu, Yuhan Zhu, Genggeng Liu, Xing Huang:
Anomaly Detection Method based on Discrete Particle Swarm Optimization for Continuous-Flow Microfluidic Biochips. ACM Great Lakes Symposium on VLSI 2024: 507-510 - [c20]Junqian Huang, Yuhan Zhu, Xing Huang, Genggeng Liu:
Washing Optimization Method Based on Deep Reinforcement Learning for Fully Programmable Valve Array Biochips. ACM Great Lakes Symposium on VLSI 2024: 529-532 - [c19]Zhenyuan Wu, Yuhan Zhu, Xing Huang, Genggeng Liu:
Error Recovery Method Based on Deep Reinforcement Learning for Fully Programmable Valve Array Biochips. ACM Great Lakes Symposium on VLSI 2024: 533-536 - [c18]Zhengyang Ye, Zhisheng Chen, Youlin Pan, Genggeng Liu, Wenzhong Guo, Tsung-Yi Ho, Xing Huang:
Timing-Driven High-Level Synthesis for Continuous-Flow Microfluidic Biochips. ISQED 2024: 1-6 - 2023
- [j21]Xing Huang, Youlin Pan, Zhen Chen, Wenzhong Guo, Lu Wang, Qingshan Li, Robert Wille, Tsung-Yi Ho, Ulf Schlichtmann:
Design Automation for Continuous-Flow Lab-on-a-Chip Systems: A One-Pass Paradigm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(1): 327-331 (2023) - [j20]Ling Zhang, Zipeng Li, Xing Huang, Krishnendu Chakrabarty:
Enhanced Built-In Self-Diagnosis and Self-Repair Techniques for Daisy-Chain Design in MEDA Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(10): 3236-3249 (2023) - [j19]Zhisheng Chen, Wenzhong Guo, Genggeng Liu, Xing Huang:
Application Mapping and Control-system Design for Microfluidic Biochips with Distributed Channel Storage. ACM Trans. Design Autom. Electr. Syst. 28(2): 29:1-29:30 (2023) - [c17]Genggeng Liu, Yuhan Zhu, Wenzhong Guo, Xing Huang:
Fault-Tolerance-Oriented Physical Design for Fully Programmable Valve Array Biochips. DAC 2023: 1-6 - 2022
- [j18]Xing Huang, Tsung-Yi Ho, Wenzhong Guo, Bing Li, Krishnendu Chakrabarty, Ulf Schlichtmann:
Computer-aided Design Techniques for Flow-based Microfluidic Lab-on-a-chip Systems. ACM Comput. Surv. 54(5): 97:1-97:29 (2022) - [j17]Genggeng Liu, Hongbin Huang, Zhisheng Chen, Hongxing Lin, Hui Liu, Xing Huang, Wenzhong Guo:
Design automation for continuous-flow microfluidic biochips: A comprehensive review. Integr. 82: 48-66 (2022) - [j16]Xing Huang, Wenzhong Guo, Zhisheng Chen, Bing Li, Tsung-Yi Ho, Ulf Schlichtmann:
Flow-Based Microfluidic Biochips With Distributed Channel Storage: Synthesis, Physical Design, and Wash Optimization. IEEE Trans. Computers 71(2): 464-478 (2022) - [j15]Genggeng Liu, Xinghai Zhang, Wenzhong Guo, Xing Huang, Wen-Hao Liu, Kai-Yuan Chao, Ting-Chi Wang:
Timing-Aware Layer Assignment for Advanced Process Technologies Considering via Pillars. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(6): 1957-1970 (2022) - [j14]Xing Huang, Youlin Pan, Grace Li Zhang, Bing Li, Wenzhong Guo, Tsung-Yi Ho, Ulf Schlichtmann:
PathDriver+: Enhanced Path-Driven Architecture Design for Flow-Based Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(7): 2185-2198 (2022) - [j13]Hui-Chieh Yu, Yu-Huei Lin, Zhiyang Chen, Bing Li, Xing Huang, Ulf Schlichtmann, Tsung-Yi Ho, Hailong Yao:
Contamination-Aware Synthesis for Programmable Microfluidic Devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 5016-5029 (2022) - [j12]Xing Huang, Tsung-Yi Ho, Zepeng Li, Genggeng Liu, Lu Wang, Qingshan Li, Wenzhong Guo, Bing Li, Ulf Schlichtmann:
MiniControl 2.0: Co-Synthesis of Flow and Control Layers for Microfluidic Biochips With Strictly Constrained Control Ports. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(12): 5449-5463 (2022) - [j11]Grace Li Zhang, Bing Li, Xing Huang, Xunzhao Yin, Cheng Zhuo, Masanori Hashimoto, Ulf Schlichtmann:
VirtualSync+: Timing Optimization With Virtual Synchronization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(12): 5526-5540 (2022) - [j10]Wenzhong Guo, Sihuang Lian, Chen Dong, Zhenyi Chen, Xing Huang:
A Survey on Security of Digital Microfluidic Biochips: Technology, Attack, and Defense. ACM Trans. Design Autom. Electr. Syst. 27(4): 40:1-40:33 (2022) - [c16]Hsin-Chuan Huang, Chi-Chun Liang, Qining Wang, Xing Huang, Tsung-Yi Ho, Chang-Jin Kim:
NR-Router: Non-Regular Electrode Routing with Optimal Pin Selection for Electrowetting-on-Dielectric Chips. ASP-DAC 2022: 56-61 - [c15]Lieqiu Jiang, Zepeng Li, Chenpeng Bao, Genggeng Liu, Xing Huang, Wen-Hao Liu, Ting-Chi Wang:
LA-SVR: A High-Performance Layer Assignment Algorithm with Slew Violations Reduction. VLSI-SoC 2022: 1-6 - [c14]Yidan Jing, Liliang Yang, Zhen Zhuang, Genggeng Liu, Xing Huang, Wen-Hao Liu, Ting-Chi Wang:
SPTA: A Scalable Parallel ILP-Based Track Assignment Algorithm with Two-Stage Partition. VLSI-SoC 2022: 1-6 - [i1]Grace Li Zhang, Bing Li, Xing Huang, Xunzhao Yin, Cheng Zhuo, Masanori Hashimoto, Ulf Schlichtmann:
VirtualSync+: Timing Optimization with Virtual Synchronization. CoRR abs/2203.05516 (2022) - 2021
- [j9]Chunfeng Liu, Xing Huang, Bing Li, Hailong Yao, Paul Pop, Tsung-Yi Ho, Ulf Schlichtmann:
DCSA: Distributed Channel-Storage Architecture for Flow-Based Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(1): 115-128 (2021) - [c13]Grace Li Zhang, Bing Li, Xing Huang, Chen Shen, Shuhang Zhang, Florin Burcea, Helmut Graeb, Tsung-Yi Ho, Hai Li, Ulf Schlichtmann:
An Efficient Programming Framework for Memristor-based Neuromorphic Computing. DATE 2021: 1068-1073 - [c12]Zhen Zhuang, Xing Huang, Genggeng Liu, Wenzhong Guo, Weikang Qian, Wen-Hao Liu:
ALIFRouter: A Practical Architecture-Level Inter-FPGA Router for Logic Verification. DATE 2021: 1570-1573 - [c11]Xing Huang, Youlin Pan, Zhen Chen, Wenzhong Guo, Robert Wille, Tsung-Yi Ho, Ulf Schlichtmann:
BigIntegr: One-Pass Architectural Synthesis for Continuous-Flow Microfluidic Lab-on-a-Chip Systems. ICCAD 2021: 1-8 - 2020
- [j8]Xing Huang, Tsung-Yi Ho, Krishnendu Chakrabarty, Wenzhong Guo:
Timing-Driven Flow-Channel Network Construction for Continuous-Flow Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(6): 1314-1327 (2020) - [j7]Ying Zhu, Xing Huang, Bing Li, Tsung-Yi Ho, Qin Wang, Hailong Yao, Robert Wille, Ulf Schlichtmann:
Multicontrol: Advanced Control-Logic Synthesis for Flow-Based Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2489-2502 (2020) - [c10]Xinghai Zhang, Zhen Zhuang, Genggeng Liu, Xing Huang, Wen-Hao Liu, Wenzhong Guo, Ting-Chi Wang:
MiniDelay: Multi-Strategy Timing-Aware Layer Assignment for Advanced Technology Nodes. DATE 2020: 586-591 - [c9]Zhen Zhuang, Genggeng Liu, Xing Huang, Xiaotao Jia, Wen-Hao Liu, Wenzhong Guo:
MSFRoute: Multi-Stage FPGA Routing for Timing Division Multiplexing Technique. ACM Great Lakes Symposium on VLSI 2020: 107-112 - [c8]Guorong He, Chen Dong, Xing Huang, Wenzhong Guo, Ximeng Liu, Tsung-Yi Ho:
HTcatcher: Finite State Machine and Feature Verifcation for Large-scale Neuromorphic Computing Systems. ACM Great Lakes Symposium on VLSI 2020: 415-420 - [c7]Xing Huang, Youlin Pan, Grace Li Zhang, Bing Li, Wenzhong Guo, Tsung-Yi Ho, Ulf Schlichtmann:
PathDriver: A Path-Driven Architectural Synthesis Flow for Continuous-Flow Microfluidic Biochips. ICCAD 2020: 29:1-29:8 - [c6]Chen Dong, Lingqing Liu, Huangda Liu, Wenzhong Guo, Xing Huang, Sihuang Lian, Ximeng Liu, Tsung-Yi Ho:
A Survey of DMFBs Security: State-of-the-Art Attack and Defense. ISQED 2020: 14-20
2010 – 2019
- 2019
- [j6]Chen Dong, Fan Zhang, Ximeng Liu, Xing Huang, Wenzhong Guo, Yang Yang:
A Locating Method for Multi-Purposes HTs Based on the Boundary Network. IEEE Access 7: 110936-110950 (2019) - [c5]Xing Huang, Tsung-Yi Ho, Wenzhong Guo, Bing Li, Ulf Schlichtmann:
MiniControl: Synthesis of Continuous-Flow Microfluidics with Strictly Constrained Control Ports. DAC 2019: 145 - [c4]Zhisheng Chen, Xing Huang, Wenzhong Guo, Bing Li, Tsung-Yi Ho, Ulf Schlichtmann:
Physical Synthesis of Flow-Based Microfluidic Biochips Considering Distributed Channel Storage. DATE 2019: 1525-1530 - [c3]Xing Huang, Chi-Chun Liang, Jia Li, Tsung-Yi Ho, Chang-Jin Kim:
Open-Source Incubation Ecosystem for Digital Microfluidics - Status and Roadmap: Invited Paper. ICCAD 2019: 1-6 - 2017
- [j5]Xing Huang, Wenzhong Guo, Genggeng Liu, Guolong Chen:
MLXR: multi-layer obstacle-avoiding X-architecture Steiner tree construction for VLSI routing. Sci. China Inf. Sci. 60(1): 19102:1-19102:3 (2017) - 2016
- [j4]Xing Huang, Wenzhong Guo, Genggeng Liu, Guolong Chen:
FH-OAOS: A Fast Four-Step Heuristic for Obstacle-Avoiding Octilinear Steiner Tree Construction. ACM Trans. Design Autom. Electr. Syst. 21(3): 48:1-48:31 (2016) - 2015
- [j3]Genggeng Liu, Wenzhong Guo, Yuzhen Niu, Guolong Chen, Xing Huang:
A PSO-based timing-driven Octilinear Steiner tree algorithm for VLSI routing considering bend reduction. Soft Comput. 19(5): 1153-1169 (2015) - [j2]Genggeng Liu, Xing Huang, Wenzhong Guo, Yuzhen Niu, Guolong Chen:
Multilayer Obstacle-Avoiding X-Architecture Steiner Minimal Tree Construction Based on Particle Swarm Optimization. IEEE Trans. Cybern. 45(5): 989-1002 (2015) - [j1]Xing Huang, Genggeng Liu, Wenzhong Guo, Yuzhen Niu, Guolong Chen:
Obstacle-Avoiding Algorithm in X-Architecture Based on Discrete Particle Swarm Optimization for VLSI Design. ACM Trans. Design Autom. Electr. Syst. 20(2): 24:1-24:28 (2015) - [c2]Xing Huang, Wenzhong Guo, Guolong Chen:
Fast obstacle-avoiding octilinear steiner minimal tree construction algorithm for VLSI design. ISQED 2015: 46-50 - 2013
- [c1]Xing Huang, Genggeng Liu, Wenzhong Guo, Guolong Chen:
Obstacle-Avoiding Octagonal Steiner Tree construction based on Particle Swarm Optimization. ICNC 2013: 539-543
Coauthor Index
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