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ORCID18th MCSoC 2025: Singapore
- 18th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2025, Singapore, December 15-18, 2025. IEEE 2025, ISBN 979-8-3315-6571-8
- Abderazek Ben Abdallah:
Message from the Steering Committee Chair MCSoC 2025. xxiv - Tee Hui Teo, Lan-Da Van:
Message from the General Chairs: MCSoC 2025. xxi - Jonas Hollmann, Oliver Jakob Arndt, Ioannis Kyriakopoulos, Martin Friedrich, Holger Blume:
Enhancing Static Task Scheduling for Pipelined Cyclic Executions on Heterogeneous Architectures. 1-8 - Yan Yan, Zhaoyang Zhang, Shaochen Li, Defa Wu, Jun Yang, Xin Si:
GCNIM: A Booth-6T-SRAM Based Graph-Convolutional-Networks-in-Memory Computing Macro. 1-6 - Atsuya Watanabe, Ratna Aisuwarya, Lei Jing:
P2P-Insole: Human Pose Estimation Using Foot Pressure Distribution and Motion Sensors. 1-6 - Zhengda Wu, Ruihao Chen, Yixiao Feng, Mingtai Lv, Sining Yang, Lulu Wang, Hanyan Huang:
Response Time Analysis of CIL-EDF Scheduling for ROS2 Multi-Threaded Executors. 1-4 - Julian Robledo, Jerónimo Castrillón:
Automating Timing Enclaves for Reactive Programs in Lingua Franca. 9-16 - Sagar Sajeev, Bevan M. Baas:
Regular Expression Processing on A Many-Core Platform. 17-24 - Tiago Santos, João Bispo, João M. P. Cardoso, James C. Hoe:
HLS to FPGAs: Extending Software Regions Via Transformations and Offloading Functions to the CPU. 25-32 - Daichi Mukunoki, Katsuhisa Ozaki:
Sparse Iterative Solvers Using High-Precision Arithmetic with Quasi Multi-Word Algorithms. 33-40 - Satoshi Ohshima
, Akihiro Ida, Masatoshi Kawai, Takeshi Fukaya, Rio Yokota:
A Study on the Performance and Usability of Managed Memory and Unified Memory for Accelerating Numerical Calculation Program. 41-48 - Yulin Fu, Jiale Li, Cheng Cheng, Sean Longyu Ma, Chiu-Wing Sham, Nan Zou:
A Review of FPGA-Driven LLM Acceleration. 49-52 - Raj Singh Bisen, Vipul Kumar Chauhan, Parth Gupta, Sweta Kumari, Archit Somani:
Parallel Heuristic Semantic Walk on Large Knowledge Graphs with Text Embeddings. 53-59 - Hoseong Kim, Daejin Park:
Data Allocation Rearrangement on CNN Accelerator Based on Reshaping Systolic Tile Array Using Planarized Matrix Reordering Techniques. 60-63 - Kosei Nishio, Hasitha Muthumala Waidyasooriya, Masanori Hariyama:
Fpga-Based Highly Parallel Architecture for Multi-Robot Path Planning. 64-69 - Hasitha Muthumala Waidyasooriya, Tomohiro Matsui, Daisuke Tanaka, Masanori Hariyama:
Exploring Spatial and Temporal Parallelism for Vision Transformer Acceleration. 70-75 - Stanislav Sedukhin, Yoichi Tomioka, Kazuya Matsumoto, Yuichi Okuyama:
System and Method for Accelerating Multilinear Tensor Transformations Using an Isomorphic Architecture and Efficient Sparse Processing. 76-83 - Madhavi Palla, Arjun Chakravarthi Pogaku, Rage Uday Kiran:
PAMI-GPT: A Conversational Custom-GPT Model for Pattern Mining. 84-91 - Harsh Agarwal, Tee Hui Teo:
Towards Artificial Intelligence Chips Design: A Ground Up Approach for Beginners' Integrated Circuits Design Education. 92-97 - Tee Hui Teo, Zi Jie Chow:
Student Perspectives on AI-Powered Learning Tools: An Exploratory Study of Deepseek, ChatGPT, and Gemini in Educational Settings. 98-104 - Mudar Sarem, Yunping Zheng, KeJun Wang, Laya Albshlawy:
An Improved Deep Learning Based RGB-D Saliency Detection Model. 105-112 - Maitri Iyer, Jai Gopal Pandey:
Bridging Cryptographic Robustness and Hardware Efficiency: A Comprehensive Analysis of S-Box Design Methodologies for SoC Integration. 113-120 - Nanang Sulistiyanto, Raden Arief Setyawan, Made Wena Harilegawa:
A Direct Spike Encoding for A Lightweight Neural Network Based ECG Classification. 121-124 - Hong N. Dao, Yasuhiro Hashimoto, Truong Cong Thang:
An LLM-Enabled Multi-Agent System for Evidence-Grounded Fact Checking. 125-130 - Lashmi Kondoth, Rajan Shankaran, Quan Z. Sheng, Endrowednes Kuantama:
Hybrid Interconnect and Intermediate Memory-Based 2.5D NoC Architecture for High Performance Computing Applications. 131-134 - Martin Radetzki:
Pipelined Scheduling and Communication Synthesis for Application-Specific Networks-on-Chip. 135-142 - Maurizio Palesi, Enrico Russo, Hamaad Rafique, Giuseppe Ascia, Davide Patti, Abhijit Das, Sergi Abadal:
Instruction-Directed MAC for Efficient Classical Communication in Scalable Multi-Chip Quantum Systems. 143-150 - Sebastian Haas, Mattis Hasler, Friedrich Pauls, Christopher Dunkel, Yogesh Verma, Nilanjana Das, Michael Raitza:
An Architectural Approach for the Secure Integration of Hardware Accelerators into a Trustworthy MPSoC Platform. 151-158 - Björn A. Lindqvist, Artur Podobas:
IncineRate: Multi-Modal FPGA Accelerator Architecture for SCNNs. 165-172 - Matthias Stammler, Georgios Sotiropoulos, Julian Höfer, Tanja Harbaum, Krishnendu Guha, Amlan Chakrabarti, Jürgen Becker:
CH2AI: Dynamic Checkpoint Scheduling of Anytime Neural Networks on Heterogeneous Units. 173-180 - Fumiaki Hayafuji, Yoichi Tomioka, Yuichi Okuyama, Hiroshi Saito, Shogo Semba, Yuta Takahashi, Sumio Morioka:
Risk- and Quantization-Aware Training for Convolutional Neural Networks. 181-186 - Yuki Yagi, Kenji Kise:
Design and Implementation of a High-Performance RISC-V SoC for FPGAs with Linux Support. 187-194 - Tee Hui Teo, Maoyang Xiang, Qianrui Lin, Michael Lim Kee Hian:
Digital Dice Design Using Pseudo Random Number Generator. 195-198 - Aoba Fujino, Kenji Kise:
CFU Proving Ground: a Hardware/Software Co-Design Framework for Leveraging a Custom Function Unit and RISC-V Custom Instructions. 199-206 - Dujdow Buranapanichkit, Susanna Saengsri, Apidet Booranawong, Nattha Jindapetch, Kiattisak Sengchuai, Hiroshi Saito:
Heart Disease Monitoring System Using Smart Wireless Devices. 207-210 - Kaho Kageyama, Yamato Saikawa, Yoichi Tomioka, Hiroshi Saito:
An Approximate Dual Modular Redundancy Training Method for CNNs. 211-216 - Sampei Akira, Yuichi Okuyama, Kawana Kensuke, Hu Weiming, Yoichi Tomioka:
Autonomous Driving Model Training with 3D Gaussian Splatting Simulation and Limited Real-World Data. 217-224 - Robert Kunzelmann, Maximilian Berger, Vinod Bangalore Ganesh, Rachana R. Pai, Wolfgang Ecker:
Unifying IP Specification Through Formal Hardware Function Sets: An Industrial Case Study. 225-232 - Cosmin Radu Popa:
Low-Voltage 203dB High-Accuracy CMOS Exponential Function Generator. 233-238 - Cosmin Radu Popa:
Improved Accuracy CMOS Sigmoidal Function Synthesizers. 239-244 - Sameer Mankotia, Daniel Conte de Leon:
FlexSiMArch: An Extensible Simulator for Research and Development in Secure-by-Design Processor Technologies. 245-253 - Lashmi Kondoth, Rajan Shankaran, Quan Z. Sheng, Endrowednes Kuantama:
A Study on Proactive Adaptation-Based Routing Strategies in 2D Network-on-Chip Architectures. 254-261 - Janghun Lee, Daejin Park:
Concurrent Multi-Tasking Using Metamorphic SW Replacement. 262-265 - Dinesh Kumar, Chandra Jaiswal, Ahmad Saeed, Ravi Kumar:
Secure and Intelligent Roaming Settlements Using Blockchain and AI. 266-273 - Kosei Nakamoto, Masahito Kumagai, Masayuki Sato, Kazuhiko Komatsu, Hiroaki Kobayashi:
Disaster Rescue Resource Allocation Based on the Ising Model. 274-281 - Joy Halder, Nayeem Ahmed, Viktor Razilov, Emil Matús, Gerhard P. Fettweis:
Routing in Multi-Chip Platforms with Hybrid Interconnects. 282-288 - M. Norazizi Sham Mohd Sayuti, Leandro Soares Indrusiak:
Toward Predictable Deflection Routing in Routerless NoCs for Real-Time Systems. 289-296 - Sai Kumar Reddy, Mushtaq Ahmed, Agam Kumar Singh, Bhavna Ambudkar:
Power and Performance Evaluation of Spidergon and Mesh Topology in Network-on-Chip. 297-304 - Fawaz Alazemi, Zaid Hussian, Bader F. AlBdaiwi:
Reliable Loop Set for Routerless Network-on-Chip. 305-310 - Hanyu Yuga, Zhishang Wang, Khanh N. Dang:
Evolutionary Algorithm for STDP-Based Spiking Neural Network Model Compression. 311-318 - Hawon Park, Si Yong Lee, Ryangjin Lee, Yoora Kim, Yoon Seok Yang:
MindCore: Spike-Driven Programmable Accelerator for On-Device Neuromorphic Computing. 319-326 - Yiqin Xiang, Tee Hui Teo, Junwen Zhang, Hanzhi Ma:
Vision Spiking Transformer for Image Classification. 327-330 - Muhammad Ihsan Al Hafiz, Naresh Balaji Ravichandran, Anders Lansner, Pawel Andrzej Herman, Artur Podobas:
Embedded FPGA Acceleration of Brain-Like Neural Networks: Online Learning to Scalable Inference. 331-338 - Takaharu Suzuki, Kiyofumi Tanaka:
A Comprehensive Study on Execution Right Delegation Scheduling Algorithm for Multiprocessors. 339-346 - Chenzhang Xia, Koji Inoue:
Reducing Transmission Overhead in Edge-Assisted Visual SLAM: Compact Serialization and State-Adaptive Transmission. 347-355 - Yoshiki Yamada, Yoshiki Yamaguchi, Kenya Okabe, Yowichi Fujita, Yoshinori Fukao, Eitaro Hamada, Youichi Igarashi, Masayoshi Shoji, Hironori Uchinoyae, Tetsuichi Kishishita, Kazuki Ueno:
FPGA-Based Muon Beam Monitoring with Real-Time Fault Recovery. 356-363 - Isaac Chee, Subrahmanian Hari, Kaustubh Harnoor, Colleen Josephson, Jason K. Eshraghian:
Profiling Data Movement in SNN Memory Hierarchies. 368-371 - Pierre-Louis Sixdenier, Mark Deutel, Jürgen Teich:
Early-Exit Neural Architecture Search for Energy-Harvesting Edge Computing. 372-379 - Hoa Tran-Dang, Dong Seong Kim:
DNN-Based Optimal Partial Offloading in Multi-User Multi-Server MEC Networks. 380-385 - Satvik Ganesh, Hanyu Yuga, Zhishang Wang, Khanh N. Dang:
FSPC: A Lossy Spike Compression Through Correlated-AER Merging in Spiking Neural Networks. 386-393 - Yao Hu:
A Co-Design of Lossy Compression and Error Correction for Approximate Communication. 394-401 - Sultan Abdallah Almaqbali, Asmaa H. Marhoubi, Oualid Ali:
A Machine Learning-Based Decision Aid for Predictive Maintenance Using Fault Diagnosis Data. 402-408 - Ravinder Singh, Agam Kumar Singh, Mushtaq Ahmed:
Secure Multimodal Data Encryption Using CRT-Based Encryption and MITM-Resilient Hybrid ElGamal-AES. 409-415 - Srivenkateswara Reddy Sankiti, Vinoth Punniyamoorthy, Shiva Kumar Reddy Carimireddy, Ashok Gadi Parthi, Nachiappan Chockalingam, Kabilan Kannan, Suhas Malempati, Akash Kumar Agarwal:
Cost-Effective Kubernetes at the Edge: a Comparative Analysis of K3s on Raspberry Pi Versus Cloud Deployments. 416-421 - Venkateshwaran Dorai:
A Policy-Driven Architecture for Verifiable Geo-Compliance in Programmable Networks. 422-426 - Wen-Cheng Lai, A. Singaravelan, S. Sujitha, Balasubramanian Prabhu Kavin, Kavitha. C, Rajesh Kumar Dhanaraj, Bo-Han Peng, Chun-Yu Chiu:
Infrastructure Design of Vehicular ad Hoc Network with Algorithm. 427-430 - Khoi Pham Dang, Huy Ngo Huu Gia, Trung Nguyen Quoc, Vinh Truong Hoang, Kiet Tran-Trung:
Advancing Intelligent Surveillance: Immediate Identification of Violence and Theft Utilizing YOLOv11 and Slow-Fast Networks. 431-436 - Meisei Yamaguchi, Yutaka Masuda, Tohru Ishihara:
Cross-Layer Approximate Computing and Critical Path Isolation for Energy-Efficient and Variation-Tolerant Design. 437-444 - Tai-Feng Chen, Yutaka Masuda, Tohru Ishihara:
Utilizing Wide Range Energy/Delay Tradeoffs in Logarithmic Multipliers to Reduce Energy Dissipated for AI Inference Workloads. 445-452 - Adway Paul, Samanway Pal, Nirmoy Modak:
Real-Time In-Sensor Computing: An 8-Bit ADC-Less CMOS Sensing for Image Edge Detection. 453-460 - Kazutoshi Wakabayashi, Wataru Takahashi, Hideharu Amano:
A High Level Synthesis Tool for Multiple FPGAs. 461-468 - Mark Deutel, Axel Plinge, Dominik Seuß, Christopher Mutschler, Frank Hannig, Jürgen Teich:
Unsupervised Learning of Variational Autoencoders on Cortex-M Microcontrollers. 469-476 - Youssef Obata, Mohamed Hamada:
Adaptive Retrieval-Augmented Generative Intelligent Tutoring System for Automata Theory. 477-482 - Md. Shahajada Mia, Yutaka Watanobe, Md. Mostafizer Rahman, Md. Faizul Ibne Amin, Muepu Mukendi Daniel:
Predictive Modeling of Submissions and Learning Outcomes in Online Judge Systems. 483-489 - Daichi Higashi, Hitoshi Oi:
Performance Optimization of Machine Inference Applications on Edge Devices with a RISC-V Custom Instruction. 490-493 - Kaijie Wei, Devanshu Garg, Ryutaro Nagai, Takao Tomono, Hideharu Amano:
FP-FBEMS: FPGA-Based Optimization of Forward/Backward EMS Decoding for CV-QKD. 494-502 - Bi Ye, Shujin Zheng, Tianwen Hou, Yi Jiang, Shengnan Qin, Chengrui Le:
Polarization Ray Tracing for Multi-Axis Optical Systems in Non-Sequential Mode. 503-508 - Ipek Geçin, Emil Matús, Gerhard P. Fettweis:
History-Correlated Stride Bank Prediction for Tightly Coupled Memory Systems. 509-515 - Yiyang Fu, Fage Liu, Zhengyao He, Qianrui Lin, Tee Hui Teo:
A Quantitative Framework for Layer-Wise Material Selection in MOSFETS Using Priority-Aware Property Mapping. 516-521 - Tomoya Yokono, Keisuke Sugiura, Yoshiki Yamaguchi:
Performance Comparison for CPU, FPGA, and GPU in CRS Format Conversion Processing. 522-529 - Muepu Mukendi Daniel, Yutaka Watanobe, Md. Faizul Ibne Amin, Md. Shahajada Mia:
Comparative Evaluation of ChatGPT, Gemini, and DeepSeek in Educational Problem Solving. 530-537 - Malikussaid, Hilal Hudan Nuha, Isman Kurniawan:
Bridging the Plausibility-Validity Gap by Fine-Tuning a Reasoning-Enhanced LLM for Chemical Synthesis and Discovery. 538-545 - Minjung Kim, Daejin Park:
Efficient Load Balancing for on-Chip Symmetric Multiprocessing through a Novel RTOS Approach for Multicore Microcontrollers. 546-553 - Konstantin Dudzik, Maximilian Kirschner, Jürgen Becker:
Automated Deployment of Real-Time Tasks for Phased Execution on Scratchpad-Based Multicore Platforms. 554-561 - Yuki Oda, Yuta Ono, Hiroshi Nakamura, Hideki Takase:
Hetero-SplitEE: Split Learning of Neural Networks with Early Exits for Heterogeneous IoT Devices. 562-569 - Daisuke Suzuki, Takahiro Hanyu:
A Nonvolatile IoT Sensor Node Based on Input-Data Driven Power-Gating Scheme and its Emulation Using FPGA and Temperature Sensor. 570-573 - Mahadev A. Gawas, Hemprasad Yashwant Patil, Mridini Gawas:
Detection of Avian Influenza-Infected Chickens Using a Multi-Modal Audio-Visual Convolutional Neural Network Optimized for Indian Poultry Farms. 574-581 - Xinghang Tan, Tee Hui Teo:
Design and Implementation of a BRAM-Banked Double-Buffered Matrix Multiplication Accelerator for Transformer Models on Edge FPGAs. 582-585 - Robert H. Bissonette, Frank Lynch, Michael Conrad Meyer:
Development of Haul Truck Models for Testing Autonomous Safety in 1/14 Scale Test Mine. 586-591 - Derek Li, Yechengnuo Zhang, Bevan Baas:
Huffman Decoder for Baseline JPEG on Many-Core Platforms. 592-598 - Michael Wang, Bevan M. Baas:
Scalable Discrete Cosine Transform Engines on a Many-Core Platform. 599-605 - Haipeng Zhu, Yuan He, Xiaohan Yue, Qinyang Zhang, Lihui Wang, Shi Bai:
Accelerating Magnetic Particle Imaging with Data Parallelism: A Comparative Study. 606-613 - Masato Gocho, Masayoshi Tsuchida, Kazunori Ueda:
Mixed-Precision Backprojection Using FP32 and FP64 for Boosting Satellite SAR Imaging on Embedded GPUs. 614-621 - Ratna Aisuwarya, Lei Jing:
Adaptive Calibration of Piezoresistive Pressure Sensors Across Variable Sensor Sizes. 622-627 - Md Farhadur Reza, Ali Kelly:
Advancing Dementia Prediction: A Robust CNN Framework for Early Diagnosis. 628-635 - Gowsiya Syednoor Shek, Shaik Salma Aga:
Smartwatch Design for Pedestrian Collision Detection. 636-638 - Chia-Heng Liu, Hsuan-Yu Huang, Bo-Chun Chen, Kun-Chih Jimmy Chen:
Energy-Efficient and Accurate Stochastic Computing-Based Multiply-Accumulate Architecture for Neural Network Accelerator Design. 645-652 - Yasuyuki Suzuki, Hiroshi Saito, Shogo Semba, Yoichi Tomioka, Takahiro Hanyu:
Random Forest-Based Approximation for Quantized CNNs on Edge FPGAs. 653-660 - Anastasios Petropoulos, Theodore Antonakopoulos:
Instruction-Based Coordination of Heterogeneous Processing Units for Acceleration of DNN Inference. 661-669 - Kyoji Awaki, Yoichi Tomioka, Yuichi Okuyama, Hiroshi Saito, Shogo Semba, Stanislav Sedukhin, Yuta Takahashi, Sumio Morioka:
Design and Power-Efficiency Analysis of FPGA-Based Dot and Outer Product Units. 670-677 - Kazuki Okazawa, Hiroki Nishikawa, Dafang Zhao, Ittetsu Taniguchi, Takao Onoye, Marcos de Melo da Silva, Abdoulaye Gamatié:
Carbon-Neutral Computing at the Edge: Scalable Greedy - LP Optimization of Green Data Centers. 678-685 - Anish Gupta, Sweta Kumari, Suryansh Rohil, Archit Somani:
OPT-MorphDAG: An Efficient Implementation of Directed Acyclic Graph (DAG)-Based Blockchain. 686-693 - Weixiong Zhang, Weili Wang, Xuexuan Zhong, Lingjun Zhao, Qinglin Yang, Huakun Huang:
From WiFi Signals to Skeletons: Accurate Multi-Person Pose Estimation with Mpnet. 694-699 - Weili Wang, Weixiong Zhang, Lingjun Zhao, Jiamin Yao, Qinglin Yang, Huakun Huang:
Efficient WiFi-Based Human Pose Estimation via Lightweight Model Design with Knowledge Distillation. 700-705 - Mostafa Elsharkawy, Tee Hui Teo, I-Chyn Wei:
FPGA Implementation of Tiny Transformer Using High-Level-Synthesis for Biomedical Applications. 706-709 - Yosi Ben-Asher, Jereys Danial, Ibrahim Qashqoush, Roman Gilgor, Esti Stein:
cpuC: A Dynamic Reconfigurable Architecture for CNNs Acceleration. 710-717 - Felix Zeller, John Reuben, Dietmar Fey:
Multiplier-Free In-Memory Vector-Matrix Multiplication Using Distributed Arithmetic. 718-726 - Obed K. Allotey Babington, N. Amanquah:
An FPGA-Based Hardware-Software Co-Design Approach for Embedded Machine Learning Acceleration. 727-733 - Yawei Chen, Shaohua Chang, Eric Chien:
An Ensemble Virtual Metrology Model of Machine Learning in Semiconductor Manufacturing. 734-739 - Leonardo Passig Horstmann, Antônio Augusto Fröhlich, Josafat Leal Filho, José Luis Conradi Hoffmann:
Adaptive QoS to Handle Transient Overloads in Time-Sensitive Vehicular Networks Caused by ADAS. 740-747 - Ali Bostani:
Low-Cost Image Processing-Based Teleoperated Robotic Arm for Remote Surgical Assistance and Digital Health Integration. 748-751 - Takuto Ando, Yu Eto, Yasuhiko Nakashima:
Implementation and Evaluation of Stable Diffusion on a General-Purpose CGLA Accelerator. 752-759 - Md Farhadur Reza, Dominik Cloud:
Neural Network-Based Mapping of Deep Neural Networks Onto Network-on-Chip Architectures. 760-767 - Zongcheng Yue, Dongwei Yan, Sean Longyu Ma, Chiu-Wing Sham:
Adaptive Gradual Quantization with a Custom RISC-V SIMD Accelerator. 768-771 - Venkateshwaran Dorai:
COPA: Cost and Performance Aware Traffic Engineering Framework in Multicloud SD-WAN. 772-779 - Daichi Kumagai, Komei Kodera, Yuya Iwata, Kenji Kise:
Robbit: A User-Friendly and Two-Wheeled Self-Balancing Robot Using an FPGA. 780-787 - Zhishang Wang, Yassine Khedher, Khanh N. Dang, Michael Cohen, Abderazek Ben Abdallah:
Analytical Modeling of Task Allocation for Distributed Anthropomorphic Robots in Mission-Critical Environments. 788-795 - Takuya Nomura, Yusuke Yamasaki, Shintaro Hosoai, Hideki Takase, Takuya Azumi:
F2MKDC: Fog-Enabled Federated Learning with Mutual Knowledge Distillation and Clustering for Data Distribution-Based Collaborative Learning. 796-803 - Pedro Antunes, Muhammad Ihsan Al Hafiz, Jonah Ekelund, Ekaterina Dineva, George Miloshevich, Panagiotis Gonidakis, Artur Podobas:
Evaluating Four FPGA-Accelerated Space Use Cases Based on Neural Network Algorithms for On-Board Inference. 804-812
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