✎ Author’s Note Recently, I worked on a project that had poor performance, and optimizing the timing was quite challenging. During the optimization process, I encountered a unique optimization related to the adder, which I would like to document. Issues with Reset Signal Fanout in Adders For reset signals in FPGA design, they are primarily … Read more
Internal RAM In addition to logic elements, all modern FPGAs have dedicated static RAM blocks, which are distributed among the logic elements and controlled by them. Operation of Internal RAM There are many parameters that affect the operation of RAM, the main parameter being the number of agents that can access the RAM simultaneously. “Single-port” … Read more
In the previous article, we introduced the first two characteristics of FPGA: hardware programmability, parallelism, and real-time capabilities, and discussed the numerous opportunities these characteristics present. In this article, we will continue to introduce the other two characteristics to complete the four main features of FPGA and its survival opportunities. Four Main Features and Survival … Read more
Using Verilog, an RTL-level design of a motor control system for two motors with encoders has been implemented in an FPGA. Introduction With the help of the hardware description language (HDL) Verilog and the AMD Vivado design suite, an RTL design of a controller system for two motors with encoders has been implemented in the … Read more
1. What is UART? UART, as one of the three commonly used low-speed buses (UART, SPI, IIC), plays an important role in designing various communication interfaces and debugging. UART stands for Universal Asynchronous Receiver/Transmitter, which is mainly used for serial data transmission between devices and operates in a full-duplex mode. When sending data, it converts … Read more
Following the previous article, Verilog *1* SPI – Development, we have simulated the design, but we have yet to see how it looks on the actual circuit. Without hands-on experience, it remains theoretical; simulation is merely a tool to expedite the actual circuit development, and we must not lose sight of that. First, let’s take … Read more
Have you ever encountered the situation where you want to run a CPU on an FPGA, connect Ethernet, or link DDR, only to find yourself overwhelmed with toolchains, mismatched interfaces, and having to manually wire everything? It feels like battling monsters every day, with a pile of redundant scripts, hand-written buses, and endless manual checks… … Read more
Overview The Xilinx white paper WP272 “Get Smart About Reset: Think Local, Not Global” details the global reset of FPGAs. In digital system design, we traditionally believe that a reset signal should be set for all flip-flops, which greatly facilitates subsequent testing. Therefore, when the document mentions that “global reset is not recommended in FPGA … Read more
Introduction Overview From deep space exploration to intelligent driving, FPGAs are driving system transformation When a satellite traverses layers of atmosphere and enters orbit, you may rarely think about the “programmable logic chip” hidden in its heart—FPGA. In the aerospace field, FPGAs (Field-Programmable Gate Arrays) are widely used for: ▪ Onboard data processing: Real-time processing … Read more
The mantis catches the cicada, while the yellow sparrow is behind Written by | Wu Hantao Edited by | Liu Mengdi 1. Background Introduction With the rapid development of the Internet of Things and electronic devices, fault injection attacks pose an increasing security threat to electronic devices. Fault injection attacks disrupt the normal operation of … Read more